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Message-ID: <20150311121302.GA23668@ulmo.nvidia.com>
Date: Wed, 11 Mar 2015 13:13:03 +0100
From: Thierry Reding <thierry.reding@...il.com>
To: Gaetan Hug <ghug@...uct.be>
Cc: linux-pwm@...r.kernel.org, linux-kernel@...r.kernel.org,
shawn.guo@...aro.org, fabio.estevam@...escale.com
Subject: Re: [PATCH RESEND] pwm: mxs: fix period divider computation
On Wed, Mar 11, 2015 at 01:08:12PM +0100, Gaetan Hug wrote:
> The driver computes which clock divider it sould be using from the
> requested period. This computation assumes that the link between the
> register value and the actual divider value is raising 2 to the power of
> the registry value.
>
> div = 1 << regvalue
>
> This is true only for the first 5 values out of 8. Next values are 64,
> 256 and, 1024 - instead of 32, 64, 128.
> This affects only the users requesting a period > 0.04369s.
>
> Replace the computation with a look-up table.
>
> Signed-off-by: Gaetan Hug <ghug@...uct.be>
> Acked-by: Shawn Guo <shawn.guo@...aro.org>
> ---
> drivers/pwm/pwm-mxs.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
Applied, though I made some last-minute changes, see below.
> diff --git a/drivers/pwm/pwm-mxs.c b/drivers/pwm/pwm-mxs.c
> index f75ecb0..c65e183 100644
> --- a/drivers/pwm/pwm-mxs.c
> +++ b/drivers/pwm/pwm-mxs.c
> @@ -35,6 +35,8 @@
> #define PERIOD_CDIV(div) (((div) & 0x7) << 20)
> #define PERIOD_CDIV_MAX 8
>
> +static unsigned const int cdiv[PERIOD_CDIV_MAX] = {1, 2, 4, 8, 16, 64, 256, 1024};
I turned this into static const unsigned int, which is the more
canonical form and wrapped this over multiple lines so as not to exceed
the 80-character limit.
Thanks,
Thierry
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