linux-kernel - Re: [PATCH] x86: Add kerneldoc for pcommit

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Date:	Wed, 11 Mar 2015 21:18:30 +0100
From:	Borislav Petkov <bp@...en8.de>
To:	Ross Zwisler <ross.zwisler@...ux.intel.com>
Cc:	linux-kernel@...r.kernel.org,
	H Peter Anvin <h.peter.anvin@...el.com>,
	Ingo Molnar <mingo@...nel.org>,
	Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCH] x86: Add kerneldoc for pcommit_sfence()

On Wed, Mar 11, 2015 at 12:19:21PM -0600, Ross Zwisler wrote:
> Add kerneldoc comments for pcommit_sfence() describing the purpose of
> the pcommit instruction and demonstrating the usage of that instruction.
> 
> Signed-off-by: Ross Zwisler <ross.zwisler@...ux.intel.com>
> Cc: H Peter Anvin <h.peter.anvin@...el.com>
> Cc: Ingo Molnar <mingo@...nel.org>
> Cc: Thomas Gleixner <tglx@...utronix.de>
> Cc: Borislav Petkov <bp@...en8.de>
> ---
>  arch/x86/include/asm/special_insns.h | 37 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 37 insertions(+)
> 
> diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
> index aeb4666e0c0a..1ae81757c05b 100644
> --- a/arch/x86/include/asm/special_insns.h
> +++ b/arch/x86/include/asm/special_insns.h
> @@ -215,6 +215,43 @@ static inline void clwb(volatile void *__p)
>  		: [pax] "a" (p));
>  }
>  
> +/**
> + * pcommit_sfence() - persistent commit and fence
> + *
> + * The pcommit instruction ensures that data that has been flushed from the
> + * processor's cache hierarchy with clwb, clflushopt or clflush is accepted to
> + * memory and is durable on the DIMM.  The primary use case for this is
> + * persistent memory.
> + *
> + * This function shows how to properly use clwb/clflushopt/clflush and pcommit
> + * with appropriate fencing:
> + *
> + * void flush_and_commit_buffer(void *vaddr, unsigned int size)
> + * {
> + *         unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1;
> + *         char *vend = (char *)vaddr + size;
> + *         char *p;
> + *
> + *         for (p = (char *)((unsigned long)vaddr & ~clflush_mask);
> + *              p < vend; p += boot_cpu_data.x86_clflush_size)
> + *                 clwb(p);
> + *
> + *         // sfence to order clwb/clflushopt/clflush cache flushes
> + *         // mfence via mb() also works
> + *         wmb();
> + *
> + *         // pcommit and the required sfence for ordering
> + *         pcommit_sfence();
> + * }
> + *
> + * After this function completes the data pointed to by vaddr is has been

s/is //

I fixed it up while applying,

thanks.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.
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