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Message-ID: <1426111778-17942-1-git-send-email-jesse.larrew@amd.com>
Date: Wed, 11 Mar 2015 17:09:38 -0500
From: <jesse.larrew@....com>
To: <x86@...nel.org>
CC: Joel Schopp <joel.schopp@....com>, Tony Luck <tony.luck@...el.com>,
Borislav Petkov <bp@...en8.de>,
Thomas Gleixner <tglx@...utronix.de>,
"Ingo Molnar" <mingo@...hat.com>, "H. Peter Anvin" <hpa@...or.com>,
<linux-edac@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Jesse Larrew <jesse.larrew@....com>
Subject: [PATCH] mce: use safe MSR accesses
From: Jesse Larrew <jesse.larrew@....com>
When running as a guest under kvm, it's possible that the MSR
being accessed may not be implemented. All MSR accesses should
be prepared to handle exceptions.
Signed-off-by: Jesse Larrew <jesse.larrew@....com>
---
arch/x86/kernel/cpu/mcheck/mce.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 61a9668ce..4151ba9 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1556,12 +1556,12 @@ static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
wrmsrl(MSR_K7_HWCR, hwcr | BIT(18));
for (i = 0; i < ARRAY_SIZE(msrs); i++) {
- rdmsrl(msrs[i], val);
+ rdmsrl_safe(msrs[i], &val);
/* CntP bit set? */
if (val & BIT_64(62)) {
val &= ~BIT_64(62);
- wrmsrl(msrs[i], val);
+ wrmsrl_safe(msrs[i], val);
}
}
--
1.9.1
--
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