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Message-ID: <20150312195527.GC497@linaro.org>
Date: Thu, 12 Mar 2015 13:55:27 -0600
From: Lina Iyer <lina.iyer@...aro.org>
To: Andy Gross <agross@...eaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@...ymobile.com>,
Ohad Ben-Cohen <ohad@...ery.com>,
linux-arm-msm@...r.kernel.org, Jeffrey Hugo <jhugo@...eaurora.org>,
Suman Anna <s-anna@...com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 2/2] hwspinlock: qcom: Add support for Qualcomm HW
Mutex block
On Thu, Mar 12 2015 at 13:43 -0600, Andy Gross wrote:
>On Thu, Mar 12, 2015 at 01:31:50PM -0600, Lina Iyer wrote:
>> On Fri, Feb 27 2015 at 15:30 -0700, Bjorn Andersson wrote:
>> >Add driver for Qualcomm Hardware Mutex block found in many Qualcomm
>> >SoCs.
>> >
>> >Based on initial effort by Kumar Gala <galak@...eaurora.org>
>> >
>> >Signed-off-by: Bjorn Andersson <bjorn.andersson@...ymobile.com>
>> >---
>> >
>>
>> [...]
>>
>> >+#include "hwspinlock_internal.h"
>> >+
>> >+#define QCOM_MUTEX_APPS_PROC_ID 1
>> Hi Bjorn,
>>
>> Not all locks use 1 to indicate its locked. For example lock index 7 is
>> used by cpuidle driver between HLOS and SCM. It uses a write value of
>> (128 + smp_processor_id()) to lock.
>
>So this was the lock_rlock_id API?
>
Correct.
>>
>> A cpu acquires the remote spin lock, and calls into SCM to terminate the
>> power down sequence while passing the state of the L2. The lock help
>> guarantee the last core to hold the spinlock to have the most up to date
>> value for the L2 flush flag.
>>
>> >+#define QCOM_MUTEX_NUM_LOCKS 32
>>
>> Also, talking to Jeff it seems like that out of the 32 locks defined
>> only 8 is accessible from Linux. So its unnecessary and probably
>> incorrect to assume that there are 32 locks available.
>
>Out of curiosity, this is a TZ thing? If so, we'd expect issues if someone
>decides to utilize resources that, while technically are present, are unusable
>by that processor. This is not that much different from someone misconfiguring
>an EE on a DMA controller.
>
Per Jeff, the protection unit doesnt generally allow access to locks > 8
and shouldnt be allowed and in some SoC's where they dont have the
protection, it might still be a bad idea. It would be safer to restrict to
8, than allow all 32 and hope somebody doesnt do the wrong thing.
>> >+{
>> >+ struct regmap_field *field = lock->priv;
>> >+ u32 lock_owner;
>> >+ int ret;
>> >+
>> >+ ret = regmap_field_write(field, QCOM_MUTEX_APPS_PROC_ID);
>> >+ if (ret)
>> >+ return ret;
>> >+
>> >+ ret = regmap_field_read(field, &lock_owner);
>> >+ if (ret)
>> >+ return ret;
>> >+
>> >+ return lock_owner == QCOM_MUTEX_APPS_PROC_ID;
>> >+}
>> >+
>>
>
>--
>Qualcomm Innovation Center, Inc.
>The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
>a Linux Foundation Collaborative Project
>
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