linux-kernel - Re: [PATCH v3 2/4] arm64: dts: Add Qualcomm MSM8916 SoC and evaluation board dts

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Date:	Fri, 13 Mar 2015 10:34:54 +0000
From:	Mark Rutland <mark.rutland@....com>
To:	Kumar Gala <galak@...eaurora.org>
Cc:	"linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"arm@...nel.org" <arm@...nel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"heiko@...ech.de" <heiko@...ech.de>
Subject: Re: [PATCH v3 2/4] arm64: dts: Add Qualcomm MSM8916 SoC and
 evaluation board dts

> > Which of spin-table/psci are you planning on using for SMP support, and
> > when would that be likely to appear?
> 
> We have a qcom specific SMP enablement method for this device.  This
> was one of our first devices so it utilized as much from arm 32-bit as
> possible.

Implementation specific enable methods are something we really don't
want to see for arm64. If PSCI is out of the question then a spin-table
shim in your bootloader shouldn't be too hard to implement.

> > Which exception level do CPUs enter the kernel? Even without a
> > virt-capable GIC booting at EL2 is less work for the FW and gives the
> > kernel a better chance of fixing things up (e.g. CNTVOFF).
> 
> I think the enter in EL1.

That's unfortunate, but so long as they are consistent, it's not the end
of the world.

Mark.
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