linux-kernel - Re: [PATCH v3 02/12] irqchip: nvic: support hierarchy irq domain

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Message-ID: <CALszF6Di4kngd1Rzp9G=xwWPc4FqOPpA+5s+jrRSUGjs8OiCLg@mail.gmail.com>
Date:	Fri, 13 Mar 2015 18:35:26 +0100
From:	Maxime Coquelin <mcoquelin.stm32@...il.com>
To:	Stefan Agner <stefan@...er.ch>
Cc:	shawn.guo@...aro.org, kernel@...gutronix.de,
	Russell King <linux@....linux.org.uk>,
	Uwe Kleine-König 
	<u.kleine-koenig@...gutronix.de>, jason@...edaemon.net,
	olof@...om.net, Arnd Bergmann <arnd@...db.de>,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Mark Rutland <mark.rutland@....com>,
	Pawel Moll <pawel.moll@....com>,
	Rob Herring <robh+dt@...nel.org>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>, marc.zyngier@....com,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 02/12] irqchip: nvic: support hierarchy irq domain

2015-03-13 0:36 GMT+01:00 Stefan Agner <stefan@...er.ch>:
> Add support for hierarchy irq domain. Use to support the interrupt
> router found in Vybrid SoC, which is between the NVIC and the
> peripherals.
>
> Signed-off-by: Stefan Agner <stefan@...er.ch>
> ---
>  drivers/irqchip/irq-nvic.c | 28 +++++++++++++++++++++++++++-
>  1 file changed, 27 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c
> index 4ff0805..5fac910 100644
> --- a/drivers/irqchip/irq-nvic.c
> +++ b/drivers/irqchip/irq-nvic.c
> @@ -49,6 +49,31 @@ nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs)
>         handle_IRQ(irq, regs);
>  }
>
> +static int nvic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
> +                               unsigned int nr_irqs, void *arg)
> +{
> +       int i, ret;
> +       irq_hw_number_t hwirq;
> +       unsigned int type = IRQ_TYPE_NONE;
> +       struct of_phandle_args *irq_data = arg;
> +
> +       ret = irq_domain_xlate_onecell(domain, irq_data->np, irq_data->args,
> +                                  irq_data->args_count, &hwirq, &type);
> +       if (ret)
> +               return ret;
> +
> +       for (i = 0; i < nr_irqs; i++)
> +               irq_map_generic_chip(domain, virq + i, hwirq + i);
> +
> +       return 0;
> +}
> +
> +static const struct irq_domain_ops nvic_irq_domain_ops = {
> +       .xlate = irq_domain_xlate_onecell,
> +       .alloc = nvic_irq_domain_alloc,

.alloc is only available with CONFIG_IRQ_DOMAIN_HIERARCHY=y, and it is
not selected by in the config ARM_NVIC entry.
It breaks the build with my STM32 series.

Once selected, the build is fine, and the board boots successfully.


Best regards,
Maxime
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