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Message-Id: <1426526944-16762-2-git-send-email-sebastien.szymanski@armadeus.com>
Date: Mon, 16 Mar 2015 18:29:04 +0100
From: Sébastien Szymanski
<sebastien.szymanski@...adeus.com>
To: David Airlie <airlied@...ux.ie>,
Philipp Zabel <p.zabel@...gutronix.de>,
dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
linux-api@...r.kernel.org
Cc: Sébastien Szymanski
<sebastien.szymanski@...adeus.com>,
Mohsin Kazmi <mohsin_kazmi@...tor.com>,
Steve Longerbeam <steve_longerbeam@...tor.com>
Subject: [PATCH 2/2] imx-drm: ipuv3-crtc: Use DRM mode flags to configure pixel clock polarity
From: Steve Longerbeam <steve_longerbeam@...tor.com>
Previously, pixel clock polarity was hardcoded and wasn't configurable.
This patch adds support to configure the pixel clock polarity from the
DRM mode flags.
[Sébastien - rebase]
Signed-off-by: Mohsin Kazmi <mohsin_kazmi@...tor.com>
Signed-off-by: Steve Longerbeam <steve_longerbeam@...tor.com>
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@...adeus.com>
---
drivers/gpu/drm/imx/ipuv3-crtc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c
index 98551e3..71f888b 100644
--- a/drivers/gpu/drm/imx/ipuv3-crtc.c
+++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
@@ -171,10 +171,12 @@ static int ipu_crtc_mode_set(struct drm_crtc *crtc,
else
sig_cfg.clkflags = 0;
+ if (mode->flags & DRM_MODE_FLAG_PCLK)
+ sig_cfg.clk_pol = 1;
+
out_pixel_fmt = ipu_crtc->interface_pix_fmt;
sig_cfg.enable_pol = 1;
- sig_cfg.clk_pol = 0;
sig_cfg.pixel_fmt = out_pixel_fmt;
sig_cfg.v_to_h_sync = 0;
sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin;
--
2.0.5
--
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