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Message-ID: <Pine.LNX.4.44L0.1503171459310.1061-100000@iolanthe.rowland.org>
Date:	Tue, 17 Mar 2015 15:01:07 -0400 (EDT)
From:	Alan Stern <stern@...land.harvard.edu>
To:	Boris Brezillon <boris.brezillon@...e-electrons.com>
cc:	Nicolas Ferre <nicolas.ferre@...el.com>,
	Jean-Christophe Plagniol-Villard <plagnioj@...osoft.com>,
	Alexandre Belloni <alexandre.belloni@...e-electrons.com>,
	Felipe Balbi <balbi@...com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	<linux-usb@...r.kernel.org>, Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	<devicetree@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>,
	Douglas Gilbert <dgilbert@...erlog.com>,
	Robert Nelson <robert.nelson@...ikey.com>
Subject: Re: [PATCH 1/5] USB: ehci-atmel: rework clk handling

On Tue, 17 Mar 2015, Boris Brezillon wrote:

> The EHCI IP only needs the UTMI/UPLL (uclk) and the peripheral (iclk)
> clocks to work properly. Remove the useless system clock (fclk).
> 
> Avoid calling set_rate on the fixed rate UTMI/IPLL clock and remove
> useless IS_ENABLED(CONFIG_COMMON_CLK) tests (all at91 platforms have been
> moved to the CCF).
> 
> This patch also fixes a bug introduced by 3440ef1 (ARM: at91/dt: fix USB
> high-speed clock to select UTMI), which was leaving the usb clock
> uninitialized and preventing the OHCI driver from setting the usb clock
> rate to 48MHz.
> This bug was caused by several things:
> 1/ usb clock drivers set the CLK_SET_RATE_GATE flag, which means the rate
>    cannot be changed once the clock is prepared
> 2/ The EHCI driver was retrieving and preparing/enabling the uhpck
>    clock which was in turn preparing its parent clock (the usb clock),
>    thus preventing any rate change because of 1/
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@...e-electrons.com>

Acked-by: Alan Stern <stern@...land.harvard.edu>

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