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Message-Id: <1426675899-19882-2-git-send-email-lee.jones@linaro.org>
Date: Wed, 18 Mar 2015 10:51:34 +0000
From: Lee Jones <lee.jones@...aro.org>
To: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linus.walleij@...aro.org, linux-gpio@...r.kernel.org
Cc: lee.jones@...aro.org, kernel@...inux.com,
Karim BEN BELGACEM <karim.ben-belgacem@...com>
Subject: [PATCH 1/6] ARM: STi: DT: STiH407: Fix retime pin mask for PIO5 and PIO35
From: Karim BEN BELGACEM <karim.ben-belgacem@...com>
This will avoid programming the retime registers when not implemented
- PIO5 : no retime registers assigned to pins 6 and 7
- PIO35 : pin 7 is reserved so no retime register assigned to it
Signed-off-by: Karim BEN BELGACEM <karim.ben-belgacem@...com>
Signed-off-by: Lee Jones <lee.jones@...aro.org>
---
arch/arm/boot/dts/stih407-pinctrl.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
index 402844c..0a754f2 100644
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -104,6 +104,7 @@
#interrupt-cells = <2>;
reg = <0x5000 0x100>;
st,bank-name = "PIO5";
+ st,retime-pin-mask = <0x3f>;
};
rc {
@@ -519,6 +520,7 @@
#interrupt-cells = <2>;
reg = <0x5000 0x100>;
st,bank-name = "PIO35";
+ st,retime-pin-mask = <0x7f>;
};
i2c4 {
--
1.9.1
--
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