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Message-id: <1426637856-3730-3-git-send-email-cw00.choi@samsung.com>
Date:	Wed, 18 Mar 2015 09:17:29 +0900
From:	Chanwoo Choi <cw00.choi@...sung.com>
To:	kgene@...nel.org
Cc:	mark.rutland@....com, marc.zyngier@....com, arnd@...db.de,
	olof@...om.net, catalin.marinas@....com, will.deacon@....com,
	inki.dae@...sung.com, chanho61.park@...sung.com,
	sw0312.kim@...sung.com, jh80.chung@...sung.com,
	ideal.song@...sung.com, cw00.choi@...sung.com,
	a.kesavan@...sung.com, devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH v7 2/9] arm64: dts: exynos: Add MSHC dt node for Exynos5433

From: Jaehoon Chung <jh80.chung@...sung.com>

This patch adds MSHC (Mobile Storage Host Controller) dt node for Exynos5433
SoC. MSHC is an interface between the system the SD/MMC card.

Cc: Kukjin Kim <kgene@...nel.org>
Cc: Mark Rutland <mark.rutland@....com>
Cc: Marc Zyngier <marc.zyngier@....com>
Cc: Arnd Bergmann <arnd@...db.de>
Cc: Olof Johansson <olof@...om.net>
Cc: Catalin Marinas <catalin.marinas@....com>
Cc: Will Deacon <will.deacon@....com>
Signed-off-by: Jaehoon Chung <jh80.chung@...sung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@...sung.com>
Acked-by: Inki Dae <inki.dae@...sung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 38 ++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 125feba..8367915 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -655,6 +655,44 @@
 			status = "disabled";
 		};
 
+		mshc_0: mshc@...40000 {
+			compatible = "samsung,exynos7-dw-mshc-smu";
+			interrupts = <0 225 0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x15540000 0x2000>;
+			clocks = <&cmu_fsys CLK_ACLK_MMC0>,
+				 <&cmu_fsys CLK_SCLK_MMC0>;
+			clock-names = "biu", "ciu";
+			fifo-depth = <0x40>;
+			status = "disabled";
+		};
+
+		mshc_1: mshc@...50000 {
+			compatible = "samsung,exynos7-dw-mshc-smu";
+			interrupts = <0 226 0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x15550000 0x2000>;
+			clocks = <&cmu_fsys CLK_ACLK_MMC1>,
+				 <&cmu_fsys CLK_SCLK_MMC1>;
+			clock-names = "biu", "ciu";
+			fifo-depth = <0x40>;
+			status = "disabled";
+		};
+
+		mshc_2: mshc@...60000 {
+			compatible = "samsung,exynos7-dw-mshc-smu";
+			interrupts = <0 227 0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x15560000 0x2000>;
+			clocks = <&cmu_fsys CLK_ACLK_MMC2>,
+				 <&cmu_fsys CLK_SCLK_MMC2>;
+			clock-names = "biu", "ciu";
+			fifo-depth = <0x40>;
+			status = "disabled";
+		};
 	};
 
 	timer {
-- 
1.8.5.5

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