linux-kernel - Re: Hardware support for vt-posted interrupts described in vt-directed-io-spec for assigned devices

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Date:	Fri, 20 Mar 2015 08:04:51 -0600
From:	Alex Williamson <alex.williamson@...hat.com>
To:	bk rakesh <rakeshbkrish@...il.com>
Cc:	linux-kernel@...r.kernel.org, kvm@...r.kernel.org,
	jiang.liu@...ux.intel.com
Subject: Re: Hardware support for vt-posted interrupts described in
 vt-directed-io-spec for assigned devices

On Fri, 2015-03-20 at 15:24 +0530, bk rakesh wrote:
> Adding few more information regarding the setup which i had created to
> test the vt-d posted interrupts for assigned devices,
> 
> Hardware used for evaluating vt-posted interrupts
>     cpu "E5-2620 v2 @ 2.10GHz" and "S2600CP server board"
> 
> I had used kernel-3.18 patched with "KVM-VFIO IRQ forward
> control(posted by eric.auger@...aro.org)",

IRQ forwarding in an ARM technology for handling level triggered
interrupts, not Intel, not even x86.

>  "hierarchy irqdomian(posted
> by jiang.liu@...ux.intel.com)" and "VT-d Posted-Interrupts
> support(http://lwn.net/Articles/626050/) and assigned the ixgbe 10G
> NIC via vfio passthrough using qemu-kvm, But resulted in the following
> dmesg output,
> 
> [233783.657187] dmar: DRHD: handling fault status reg 602
> [233783.662926] dmar: INTR-REMAP: Request device [[02:00.0] fault index 47
> INTR-REMAP:[fault reason 36] Detected reserved fields in the IRTE entry

This suggests bugs in the patch series for setting bits that are
reserved on the hardware in your test system.

> I had checked the hardware supported for posted interrupt capability
> via capability register bit 59 (#define cap_pi_support(c)    (((c) >>
> 59) & 1)),  as described in
> "http://www.intel.com/content/www/us/en/embedded/technology/virtualization/vt-directed-io-spec.html",
> Which resulted as not supported, Can anyone suggest that does this hw
> support posted vt-d feature ?

Your own hardware is telling you that it doesn't support it.

>  if not then which one to use.

Personally I would have no expectation that any currently shipping
hardware supports this feature.  If you watch one of GregKH's talks on
how the Linux community works or follow development for a while, you'll
see and hear that Intel will often pre-enable features before the
hardware that supports it is available.  I suspect this is one of those
features.  Thanks,

Alex

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