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Message-ID: <1427113923-9840-1-git-send-email-markos.chandras@imgtec.com>
Date: Mon, 23 Mar 2015 12:32:00 +0000
From: Markos Chandras <markos.chandras@...tec.com>
To: <linux-mips@...ux-mips.org>
CC: Markos Chandras <markos.chandras@...tec.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
"Jason Cooper" <jason@...edaemon.net>,
Andrew Bresticker <abrestic@...omium.org>,
Qais Yousef <qais.yousef@...tec.com>,
<linux-kernel@...r.kernel.org>
Subject: [PATCH 0/3] GIC counter fixes
Hi,
Here are a few patches to ensure the GIC counter is running before we attempt
to use it since the default value on a MIPS core can be '1' which means
the GIC counter will be stopped after a CPU reset. These patches are based
on 4.0-rc1.
Markos Chandras (3):
irqchip: irq-mips-gic: Add new functions to start/stop the GIC counter
clocksource: mips-gic-timer: Ensure GIC counter is running
MIPS: Malta: malta-time: Ensure GIC counter is running
arch/mips/mti-malta/malta-time.c | 4 +++-
drivers/clocksource/mips-gic-timer.c | 3 +++
drivers/irqchip/irq-mips-gic.c | 21 +++++++++++++++++++++
include/linux/irqchip/mips-gic.h | 2 ++
4 files changed, 29 insertions(+), 1 deletion(-)
--
2.3.3
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