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Message-ID: <CALszF6CPRqB-wOfyM6QuN3v7GNRbsaHtPv82okiLcNekoBQ2tQ@mail.gmail.com>
Date: Thu, 26 Mar 2015 23:05:52 +0100
From: Maxime Coquelin <mcoquelin.stm32@...il.com>
To: Russell King - ARM Linux <linux@....linux.org.uk>
Cc: Peter Hurley <peter@...leysoftware.com>,
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Subject: Re: [PATCH v3 10/15] serial: stm32-usart: Add STM32 USART Driver
2015-03-26 16:46 GMT+01:00 Russell King - ARM Linux <linux@....linux.org.uk>:
> On Tue, Mar 24, 2015 at 02:23:38PM -0400, Peter Hurley wrote:
>> Hi Maxime,
>>
>> On 03/12/2015 05:55 PM, Maxime Coquelin wrote:
>> > +static unsigned int stm32_get_mctrl(struct uart_port *port)
>> > +{
>> > + /*
>> > + * This routine is used for geting signals of: DTR, DCD, DSR, RI,
>> > + * and CTS/RTS
>
> It's also worth noting that this comment is wrong. This is used to get
> the state of DCD, DSR, RI and CTS. DTR and RTS are *not* included
> because the core tracks their state.
OK, thanks for pointing this.
I will fix the comment in the v4.
>
> ...
>
>> > + stm32port->clk = devm_clk_get(&pdev->dev, NULL);
>> > +
>> > + if (WARN_ON(IS_ERR(stm32port->clk)))
>>
>> Do you really need a stack trace here? Could this be dev_err() instead?
>>
>> > + return -EINVAL;
>
> Also, propagate the error code.
Ok.
>
>> > +
>> > + /* ensure that clk rate is correct by enabling the clk */
>> > + clk_prepare_enable(stm32port->clk);
>
> And remember to check the return value of clk_prepare_enable().
I will.
Thanks for the review,
Maxime
>
> --
> FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
> according to speedtest.net.
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