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Message-ID: <20150330174533.GH2366@two.firstfloor.org>
Date:	Mon, 30 Mar 2015 19:45:33 +0200
From:	Andi Kleen <andi@...stfloor.org>
To:	"Liang, Kan" <kan.liang@...el.com>
Cc:	Andi Kleen <andi@...stfloor.org>,
	Peter Zijlstra <peterz@...radead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"mingo@...nel.org" <mingo@...nel.org>,
	"acme@...radead.org" <acme@...radead.org>,
	"eranian@...gle.com" <eranian@...gle.com>
Subject: Re: [PATCH V5 4/6] perf, x86: handle multiple records in PEBS buffer

> 
> The case you mentioned has already covered in the description. 

AFAIK the description was for the "two PEBS events are happening nearby,
so the hardware merges them" case. That is different than what I
described.

Both can happen (very rarely)

> I tried both multiple different events and multiple same events.
> As you said, the collision for multiple different events is rare.
> The collision for multiple same events is very high, but it's not a useful
> configuration
> 
> As my understanding, Peter means the multiple PEBS bits could be set
> when sampling only one single event.  

-Andi
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