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Message-ID: <20150330212453.GH23123@twins.programming.kicks-ass.net>
Date:	Mon, 30 Mar 2015 23:24:53 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Andi Kleen <andi@...stfloor.org>
Cc:	"Liang, Kan" <kan.liang@...el.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"mingo@...nel.org" <mingo@...nel.org>,
	"acme@...radead.org" <acme@...radead.org>,
	"eranian@...gle.com" <eranian@...gle.com>
Subject: Re: [PATCH V5 4/6] perf, x86: handle multiple records in PEBS buffer

On Mon, Mar 30, 2015 at 10:11:16PM +0200, Andi Kleen wrote:
> 
> Fair enough.
> 
> For now we can simply only allow multi pebs if only a single
> PEBS event is active (non PEBS events don't matter, as we
> can just ignore those)
> 
> This would be always on Atom, which only has a single PEBS
> counter.

I didn't say we can't do this for the big cores; I just said I want a
coherent story about what and why we're doing this.

The explanation was missing half the story, that's not good.
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