linux-kernel - Re: [PATCH 2/6] clk: mediatek: Add initial common clock support for Mediatek SoCs.

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Date:	Mon, 30 Mar 2015 18:21:18 -0700
From:	Michael Turquette <mturquette@...aro.org>
To:	Sascha Hauer <s.hauer@...gutronix.de>,
	"Stephen Boyd" <sboyd@...eaurora.org>
Cc:	"YH Chen" <yh.chen@...iatek.com>, linux-kernel@...r.kernel.org,
	"Henry Chen" <henryc.chen@...iatek.com>,
	linux-mediatek@...ts.infradead.org, kernel@...gutronix.de,
	"Matthias Brugger" <matthias.bgg@...il.com>,
	"Yingjoe Chen" <Yingjoe.Chen@...iatek.com>,
	"Eddie Huang" <eddie.huang@...iatek.com>,
	linux-arm-kernel@...ts.infradead.org,
	"James Liao" <jamesjj.liao@...iatek.com>,
	"Sascha Hauer" <s.hauer@...gutronix.de>
Subject: Re: [PATCH 2/6] clk: mediatek: Add initial common clock support for Mediatek
 SoCs.

Quoting Sascha Hauer (2015-03-30 10:40:41)
> +static void mtk_pll_set_rate_regs(struct clk_hw *hw, u32 pcw,
> +               int postdiv)
> +{
> +       struct mtk_clk_pll *pll = to_mtk_clk_pll(hw);
> +       u32 con1, pd, val;
> +       int pll_en;
> +
> +       /* set postdiv */
> +       pd = readl(pll->pd_addr);
> +       pd &= ~(0x7 << pll->data->pd_shift);

Hi Sascha,

I found a couple of magic numbers in here. Can we replace these with
some descriptive constant?

Regards,
Mike
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