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Message-ID: <20150331140034.GE28951@linux-mips.org>
Date:	Tue, 31 Mar 2015 16:00:34 +0200
From:	Ralf Baechle <ralf@...ux-mips.org>
To:	Andrew Bresticker <abrestic@...omium.org>
Cc:	Linus Walleij <linus.walleij@...aro.org>,
	Alexandre Courbot <gnurou@...il.com>,
	devicetree@...r.kernel.org, linux-gpio@...r.kernel.org,
	linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org,
	Ezequiel Garcia <ezequiel.garcia@...tec.com>,
	James Hartley <james.hartley@...tec.com>,
	James Hogan <james.hogan@...tec.com>
Subject: Re: [PATCH V2 0/3] pinctrl: Support for IMG Pistachio

On Mon, Mar 30, 2015 at 04:16:53PM -0700, Andrew Bresticker wrote:

> This series adds support for the system pin and GPIO controller on the IMG
> Pistachio SoC.  Pistachio's system pin controller manages 99 pins, 90 of
> which are MFIOs which can be muxed between multiple functions or used
> as GPIOs.  The GPIO control for the 90 MFIOs is broken up into banks
> of 16.  Pistachio also has a second pin controller, the RPU pin controller,
> which will be supported by a future patchset through an extension to this
> driver.
> 
> Test on an IMG Pistachio BuB.  Based on mips-for-linux-next which inluces my
> series adding Pistachio platform support [1].  A branch with this series is
> available at [2].

Does this mean you want me to funnel this through the MIPS tree?  If so,
could I have an Ack from the maintainers?

Thanks,

  Ralf
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