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Date:	Thu, 2 Apr 2015 23:39:53 -0500
From:	<dinguyen@...nsource.altera.com>
To:	<linux@....linux.org.uk>, <arnd@...db.de>, <olof@...om.net>,
	<khilman@...aro.org>, <robh+dt@...nel.org>,
	<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
	<mark.rutland@....com>, <pawel.moll@....com>
CC:	<dinh.linux@...il.com>, <devicetree@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>,
	Dinh Nguyen <dinguyen@...nsource.altera.com>
Subject: [PATCH 2/7] ARM: socfpga: disable the sdmmc, and uart nodes in the base arria10

From: Dinh Nguyen <dinguyen@...nsource.altera.com>

Add status = "disabled" in the base DTSI for Arria10.  The SDMMC and uart
nodes should be enabled in the appropriate board file.

Signed-off-by: Dinh Nguyen <dinguyen@...nsource.altera.com>
---
 arch/arm/boot/dts/socfpga_arria10.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 69d616a..d843609 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -268,6 +268,7 @@
 			reg = <0xff808000 0x1000>;
 			interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
 			fifo-depth = <0x400>;
+			status = "disabled";
 		};
 
 		ocram: sram@...00000 {
@@ -324,6 +325,7 @@
 			interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
+			status = "disabled";
 		};
 
 		uart1: serial1@...02100 {
@@ -332,6 +334,7 @@
 			interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
+			status = "disabled";
 		};
 
 		usbphy0: usbphy@0 {
-- 
2.2.1

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