linux-kernel - Re: [GIT PULL] qcom SoC changes for v4.1

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Message-ID: <20150403184009.GA18274@codeaurora.org>
Date:	Fri, 3 Apr 2015 11:40:09 -0700
From:	Stephen Boyd <sboyd@...eaurora.org>
To:	Andy Gross <agross@...eaurora.org>
Cc:	Kumar Gala <galak@...eaurora.org>,
	Nicolas Dechesne <nicolas.dechesne@...aro.org>, arm@...nel.org,
	Olof Johansson <olof@...om.net>, Arnd Bergmann <arnd@...db.de>,
	linux-arm-msm <linux-arm-msm@...r.kernel.org>,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	Lina Iyer <lina.iyer@...aro.org>,
	Tyler Baker <tyler.baker@...aro.org>
Subject: Re: [GIT PULL] qcom SoC changes for v4.1

On 04/03, Andy Gross wrote:
> On Thu, Apr 02, 2015 at 12:43:50PM -0700, Stephen Boyd wrote:
> > On 04/02/15 12:25, Kumar Gala wrote:
> > >> [1] http://kernelci.org/boot/all/job/arm-soc/kernel/v4.0-rc4-354-ga0690e6586df/
> > > I think we need to associated DT updates.
> > >
> > >
> > 
> > What about this patch squashed on top? Just guessing but I suspect we
> > don't care about cell-index if we're not doing the tcsr stuff. Also, I
> > imagine we could get rid of cell-index entirely if we matched against
> > the address of the gsbi instead.
> 
> Except that the GSBI5 base address changes from chip to chip.
> 
> 

Yep, for the cell-index removal part I was thinking we would make
another table per SoC like we already have for the TCSR part. The
table would map the physical address to the GSBI number.

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