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Message-Id: <1428435862-14354-1-git-send-email-abrestic@chromium.org>
Date: Tue, 7 Apr 2015 12:44:20 -0700
From: Andrew Bresticker <abrestic@...omium.org>
To: Linus Walleij <linus.walleij@...aro.org>,
Alexandre Courbot <gnurou@...il.com>,
Ralf Baechle <ralf@...ux-mips.org>
Cc: devicetree@...r.kernel.org, linux-gpio@...r.kernel.org,
linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org,
Andrew Bresticker <abrestic@...omium.org>,
Ezequiel Garcia <ezequiel.garcia@...tec.com>,
James Hartley <james.hartley@...tec.com>,
James Hogan <james.hogan@...tec.com>
Subject: [PATCH V3 0/2] pinctrl: Support for IMG Pistachio
This series adds support for the system pin and GPIO controller on the IMG
Pistachio SoC. Pistachio's system pin controller manages 99 pins, 90 of
which are MFIOs which can be muxed between multiple functions or used
as GPIOs. The GPIO control for the 90 MFIOs is broken up into banks
of 16. Pistachio also has a second pin controller, the RPU pin controller,
which will be supported by a future patchset through an extension to this
driver.
Tested on an IMG Pistachio BuB. Based on mips-for-linux-next.
Changes from v2:
- Removed module stuff that ends up being compiled out.
Changes from v1:
- Documented pin + function generic binding.
- Changed compatible string to "img,pistachio-system-pinctrl".
- Addressed some review comments.
- A couple of bug fixes.
Cc: Ezequiel Garcia <ezequiel.garcia@...tec.com>
Cc: James Hartley <james.hartley@...tec.com>
Cc: James Hogan <james.hogan@...tec.com>
Andrew Bresticker (2):
pinctrl: Add Pistachio SoC pin control binding document
pinctrl: Add Pistachio SoC pin control driver
.../bindings/pinctrl/img,pistachio-pinctrl.txt | 217 +++
drivers/pinctrl/Kconfig | 6 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-pistachio.c | 1502 ++++++++++++++++++++
4 files changed, 1726 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/img,pistachio-pinctrl.txt
create mode 100644 drivers/pinctrl/pinctrl-pistachio.c
--
2.2.0.rc0.207.ga3a616c
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