linux-kernel - Re: [v3 1/5] arm64: kvm: add a cpu tear-down function

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Message-ID: <5525F7D6.2040304@linaro.org>
Date:	Thu, 09 Apr 2015 12:53:58 +0900
From:	AKASHI Takahiro <takahiro.akashi@...aro.org>
To:	Mark Rutland <mark.rutland@....com>
CC:	Catalin Marinas <Catalin.Marinas@....com>,
	Will Deacon <Will.Deacon@....com>,
	Marc Zyngier <Marc.Zyngier@....com>,
	"christoffer.dall@...aro.org" <christoffer.dall@...aro.org>,
	"geoff@...radead.org" <geoff@...radead.org>,
	"broonie@...nel.org" <broonie@...nel.org>,
	"david.griego@...aro.org" <david.griego@...aro.org>,
	"freddy77@...il.com" <freddy77@...il.com>,
	"kexec@...ts.infradead.org" <kexec@...ts.infradead.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linaro-kernel@...ts.linaro.org" <linaro-kernel@...ts.linaro.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [v3 1/5] arm64: kvm: add a cpu tear-down function

On 04/08/2015 10:02 PM, Mark Rutland wrote:
>> +	/* We're now in idmap, disable MMU */
>> +1:	mrs	x0, sctlr_el2
>> +	and	x1, x0, #SCTLR_EL2_EE
>> +	orr	x0, x0, x1		// preserve endianness of EL2
>> +	ldr	x1, =SCTLR_EL2_FLAGS
>> +	eor	x1, x1, xzr
>> +	bic	x0, x0, x1		// Clear SCTL_M and etc
>> +	msr	sctlr_el2, x0
>> +	isb
>
> This can instead be:
>
> 1:	mrs	x0, sctlr_el2
> 	ldr	x1, =SCTLR_EL2_FLAGS
> 	bic	x0, x0, x1
> 	msr	sctlr_el2, x0
> 	isb
>
> As SCTLR_EL2_FLAGS doesn't contain the EE bit.

Oops. I will fix it.

Thanks,
-Takahiro AKASHI

> Mark.
>
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