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Message-Id: <1428617536-9324-1-git-send-email-s.r.karlsson@gmail.com>
Date: Fri, 10 Apr 2015 00:12:15 +0200
From: Robin Karlsson <s.r.karlsson@...il.com>
To: greg@...ah.com, sudipm.mukherjee@...il.com,
teddy.wang@...iconmotion.com, sudip@...torindia.org
Cc: linux-kernel@...r.kernel.org,
Robin Karlsson <s.r.karlsson@...il.com>
Subject: [PATCH 1/2] Staging: sm750fb: fix brace coding style issues
This is a patch to sm750fb that fixes brace coding style errors and warnings found by checkpatch.pl
Signed-off-by: Robin Karlsson <s.r.karlsson@...il.com>
---
drivers/staging/sm750fb/ddk750_chip.h | 12 ++---
drivers/staging/sm750fb/ddk750_display.c | 79 +++++++++++--------------------
drivers/staging/sm750fb/ddk750_display.h | 3 +-
drivers/staging/sm750fb/ddk750_dvi.c | 6 +--
drivers/staging/sm750fb/ddk750_dvi.h | 3 +-
drivers/staging/sm750fb/ddk750_hwi2c.c | 6 +--
drivers/staging/sm750fb/ddk750_mode.c | 19 +++-----
drivers/staging/sm750fb/ddk750_mode.h | 6 +--
drivers/staging/sm750fb/ddk750_power.c | 31 ++++---------
drivers/staging/sm750fb/ddk750_power.h | 3 +-
drivers/staging/sm750fb/ddk750_sii164.c | 16 ++-----
drivers/staging/sm750fb/ddk750_sii164.h | 3 +-
drivers/staging/sm750fb/ddk750_swi2c.c | 32 ++++---------
drivers/staging/sm750fb/sm750.h | 2 +-
drivers/staging/sm750fb/sm750_accel.c | 51 +++++++-------------
drivers/staging/sm750fb/sm750_cursor.c | 33 ++++++-------
drivers/staging/sm750fb/sm750_hw.c | 80 ++++++++++++++------------------
17 files changed, 140 insertions(+), 245 deletions(-)
diff --git a/drivers/staging/sm750fb/ddk750_chip.h b/drivers/staging/sm750fb/ddk750_chip.h
index 04cb0d5..316e9cb 100644
--- a/drivers/staging/sm750fb/ddk750_chip.h
+++ b/drivers/staging/sm750fb/ddk750_chip.h
@@ -8,8 +8,7 @@
#include <linux/io.h>
/* This is all the chips recognized by this library */
-typedef enum _logical_chip_type_t
-{
+typedef enum _logical_chip_type_t {
SM_UNKNOWN,
SM718,
SM750,
@@ -18,8 +17,7 @@ typedef enum _logical_chip_type_t
logical_chip_type_t;
-typedef enum _clock_type_t
-{
+typedef enum _clock_type_t {
MXCLK_PLL,
PRIMARY_PLL,
SECONDARY_PLL,
@@ -28,8 +26,7 @@ typedef enum _clock_type_t
}
clock_type_t;
-typedef struct _pll_value_t
-{
+typedef struct _pll_value_t {
clock_type_t clockType;
unsigned long inputFreq; /* Input clock frequency to the PLL */
@@ -42,8 +39,7 @@ typedef struct _pll_value_t
pll_value_t;
/* input struct to initChipParam() function */
-typedef struct _initchip_param_t
-{
+typedef struct _initchip_param_t {
unsigned short powerMode; /* Use power mode 0 or 1 */
unsigned short chipClock; /* Speed of main chip clock in MHz unit
0 = keep the current clock setting
diff --git a/drivers/staging/sm750fb/ddk750_display.c b/drivers/staging/sm750fb/ddk750_display.c
index c84196a..37880a5 100644
--- a/drivers/staging/sm750fb/ddk750_display.c
+++ b/drivers/staging/sm750fb/ddk750_display.c
@@ -15,12 +15,10 @@ static void setDisplayControl(int ctrl,int dispState)
cnt = 0;
/* Set the primary display control */
- if (!ctrl)
- {
+ if (!ctrl) {
ulDisplayCtrlReg = PEEK32(PANEL_DISPLAY_CTRL);
/* Turn on/off the Panel display control */
- if (dispState)
- {
+ if (dispState) {
/* Timing should be enabled first before enabling the plane
* because changing at the same time does not guarantee that
* the plane will also enabled or disabled.
@@ -45,16 +43,13 @@ static void setDisplayControl(int ctrl,int dispState)
* until a few delay. Need to write
* and read it a couple times
*/
- do
- {
+ do {
cnt++;
POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg);
} while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) !=
(ulDisplayCtrlReg & ~ulReservedBits));
printk("Set Panel Plane enbit:after tried %d times\n",cnt);
- }
- else
- {
+ } else {
/* When turning off, there is no rule on the programming
* sequence since whenever the clock is off, then it does not
* matter whether the plane is enabled or disabled.
@@ -73,12 +68,10 @@ static void setDisplayControl(int ctrl,int dispState)
}
/* Set the secondary display control */
- else
- {
+ else {
ulDisplayCtrlReg = PEEK32(CRT_DISPLAY_CTRL);
- if (dispState)
- {
+ if (dispState) {
/* Timing should be enabled first before enabling the plane because changing at the
same time does not guarantee that the plane will also enabled or disabled.
*/
@@ -100,16 +93,13 @@ static void setDisplayControl(int ctrl,int dispState)
FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE) |
FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_4_MASK, ENABLE);
- do
- {
+ do {
cnt++;
POKE32(CRT_DISPLAY_CTRL, ulDisplayCtrlReg);
} while((PEEK32(CRT_DISPLAY_CTRL) & ~ulReservedBits) !=
(ulDisplayCtrlReg & ~ulReservedBits));
printk("Set Crt Plane enbit:after tried %d times\n",cnt);
- }
- else
- {
+ } else {
/* When turning off, there is no rule on the programming
* sequence since whenever the clock is off, then it does not
* matter whether the plane is enabled or disabled.
@@ -132,7 +122,7 @@ static void setDisplayControl(int ctrl,int dispState)
static void waitNextVerticalSync(int ctrl,int delay)
{
unsigned int status;
- if(!ctrl){
+ if(!ctrl) {
/* primary controller */
/* Do not wait when the Primary PLL is off or display control is already off.
@@ -140,63 +130,51 @@ static void waitNextVerticalSync(int ctrl,int delay)
if ((FIELD_GET(PEEK32(PANEL_PLL_CTRL), PANEL_PLL_CTRL, POWER) ==
PANEL_PLL_CTRL_POWER_OFF) ||
(FIELD_GET(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, TIMING) ==
- PANEL_DISPLAY_CTRL_TIMING_DISABLE))
- {
+ PANEL_DISPLAY_CTRL_TIMING_DISABLE)) {
return;
}
- while (delay-- > 0)
- {
+ while (delay-- > 0) {
/* Wait for end of vsync. */
- do
- {
+ do {
status = FIELD_GET(PEEK32(SYSTEM_CTRL),
SYSTEM_CTRL,
PANEL_VSYNC);
- }
- while (status == SYSTEM_CTRL_PANEL_VSYNC_ACTIVE);
+ } while (status == SYSTEM_CTRL_PANEL_VSYNC_ACTIVE);
/* Wait for start of vsync. */
- do
- {
+ do {
status = FIELD_GET(PEEK32(SYSTEM_CTRL),
SYSTEM_CTRL,
PANEL_VSYNC);
- }
- while (status == SYSTEM_CTRL_PANEL_VSYNC_INACTIVE);
+ } while (status == SYSTEM_CTRL_PANEL_VSYNC_INACTIVE);
}
- }else{
+ } else {
/* Do not wait when the Primary PLL is off or display control is already off.
This will prevent the software to wait forever. */
if ((FIELD_GET(PEEK32(CRT_PLL_CTRL), CRT_PLL_CTRL, POWER) ==
CRT_PLL_CTRL_POWER_OFF) ||
(FIELD_GET(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, TIMING) ==
- CRT_DISPLAY_CTRL_TIMING_DISABLE))
- {
+ CRT_DISPLAY_CTRL_TIMING_DISABLE)) {
return;
}
- while (delay-- > 0)
- {
+ while (delay-- > 0) {
/* Wait for end of vsync. */
- do
- {
+ do {
status = FIELD_GET(PEEK32(SYSTEM_CTRL),
SYSTEM_CTRL,
CRT_VSYNC);
- }
- while (status == SYSTEM_CTRL_CRT_VSYNC_ACTIVE);
+ } while (status == SYSTEM_CTRL_CRT_VSYNC_ACTIVE);
/* Wait for start of vsync. */
- do
- {
+ do {
status = FIELD_GET(PEEK32(SYSTEM_CTRL),
SYSTEM_CTRL,
CRT_VSYNC);
- }
- while (status == SYSTEM_CTRL_CRT_VSYNC_INACTIVE);
+ } while (status == SYSTEM_CTRL_CRT_VSYNC_INACTIVE);
}
}
}
@@ -233,14 +211,14 @@ static void swPanelPowerSequence(int disp,int delay)
void ddk750_setLogicalDispOut(disp_output_t output)
{
unsigned int reg;
- if(output & PNL_2_USAGE){
+ if(output & PNL_2_USAGE) {
/* set panel path controller select */
reg = PEEK32(PANEL_DISPLAY_CTRL);
reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,SELECT,(output & PNL_2_MASK)>>PNL_2_OFFSET);
POKE32(PANEL_DISPLAY_CTRL,reg);
}
- if(output & CRT_2_USAGE){
+ if(output & CRT_2_USAGE) {
/* set crt path controller select */
reg = PEEK32(CRT_DISPLAY_CTRL);
reg = FIELD_VALUE(reg,CRT_DISPLAY_CTRL,SELECT,(output & CRT_2_MASK)>>CRT_2_OFFSET);
@@ -250,17 +228,17 @@ void ddk750_setLogicalDispOut(disp_output_t output)
}
- if(output & PRI_TP_USAGE){
+ if(output & PRI_TP_USAGE) {
/* set primary timing and plane en_bit */
setDisplayControl(0,(output&PRI_TP_MASK)>>PRI_TP_OFFSET);
}
- if(output & SEC_TP_USAGE){
+ if(output & SEC_TP_USAGE) {
/* set secondary timing and plane en_bit*/
setDisplayControl(1,(output&SEC_TP_MASK)>>SEC_TP_OFFSET);
}
- if(output & PNL_SEQ_USAGE){
+ if(output & PNL_SEQ_USAGE) {
/* set panel sequence */
swPanelPowerSequence((output&PNL_SEQ_MASK)>>PNL_SEQ_OFFSET,4);
}
@@ -293,8 +271,7 @@ int ddk750_initDVIDisp(void)
1, /* Enable continuous Sync */
1, /* Enable PLL Filter */
4 /* Use the recommended value for PLL Filter value */
- ) != 0) && (dviGetVendorID() != 0x0000) && (dviGetDeviceID() != 0x0000))
- {
+ ) != 0) && (dviGetVendorID() != 0x0000) && (dviGetDeviceID() != 0x0000)) {
return (-1);
}
diff --git a/drivers/staging/sm750fb/ddk750_display.h b/drivers/staging/sm750fb/ddk750_display.h
index ae0f84c..fc0bcbb 100644
--- a/drivers/staging/sm750fb/ddk750_display.h
+++ b/drivers/staging/sm750fb/ddk750_display.h
@@ -86,8 +86,7 @@
CRT means crt path DSUB
*/
#if 0
-typedef enum _disp_output_t
-{
+typedef enum _disp_output_t {
NO_DISPLAY = DPMS_OFF,
LCD1_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DPMS_OFF|DAC_ON,
diff --git a/drivers/staging/sm750fb/ddk750_dvi.c b/drivers/staging/sm750fb/ddk750_dvi.c
index f5932bb..fad0863 100644
--- a/drivers/staging/sm750fb/ddk750_dvi.c
+++ b/drivers/staging/sm750fb/ddk750_dvi.c
@@ -9,8 +9,7 @@
/* This global variable contains all the supported driver and its corresponding
function API. Please set the function pointer to NULL whenever the function
is not supported. */
-static dvi_ctrl_device_t g_dcftSupportedDviController[] =
-{
+static dvi_ctrl_device_t g_dcftSupportedDviController[] = {
#ifdef DVI_CTRL_SII164
{
.pfnInit = sii164InitChip,
@@ -45,8 +44,7 @@ int dviInit(
{
dvi_ctrl_device_t *pCurrentDviCtrl;
pCurrentDviCtrl = g_dcftSupportedDviController;
- if(pCurrentDviCtrl->pfnInit != NULL)
- {
+ if(pCurrentDviCtrl->pfnInit != NULL) {
return pCurrentDviCtrl->pfnInit(edgeSelect, busSelect, dualEdgeClkSelect, hsyncEnable,
vsyncEnable, deskewEnable, deskewSetting, continuousSyncEnable,
pllFilterEnable, pllFilterValue);
diff --git a/drivers/staging/sm750fb/ddk750_dvi.h b/drivers/staging/sm750fb/ddk750_dvi.h
index 50bcec2..fe2b7c4 100644
--- a/drivers/staging/sm750fb/ddk750_dvi.h
+++ b/drivers/staging/sm750fb/ddk750_dvi.h
@@ -27,8 +27,7 @@ typedef void (*PFN_DVICTRL_CLEARINTERRUPT)(void);
/* Structure to hold all the function pointer to the DVI Controller. */
-typedef struct _dvi_ctrl_device_t
-{
+typedef struct _dvi_ctrl_device_t {
PFN_DVICTRL_INIT pfnInit;
PFN_DVICTRL_RESETCHIP pfnResetChip;
PFN_DVICTRL_GETCHIPSTRING pfnGetChipString;
diff --git a/drivers/staging/sm750fb/ddk750_hwi2c.c b/drivers/staging/sm750fb/ddk750_hwi2c.c
index 7826376..11b56ee 100644
--- a/drivers/staging/sm750fb/ddk750_hwi2c.c
+++ b/drivers/staging/sm750fb/ddk750_hwi2c.c
@@ -106,8 +106,7 @@ static unsigned int hwI2CWriteData(
* Note:
* Only 16 byte can be accessed per i2c start instruction.
*/
- do
- {
+ do {
/* Reset I2C by writing 0 to I2C_RESET register to clear the previous status. */
POKE32(I2C_RESET, 0);
@@ -173,8 +172,7 @@ static unsigned int hwI2CReadData(
* Note:
* Only 16 byte can be accessed per i2c start instruction.
*/
- do
- {
+ do {
/* Reset I2C by writing 0 to I2C_RESET register to clear all the status. */
POKE32(I2C_RESET, 0);
diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c
index 2e418fb..08761fd 100644
--- a/drivers/staging/sm750fb/ddk750_mode.c
+++ b/drivers/staging/sm750fb/ddk750_mode.c
@@ -80,8 +80,7 @@ static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll)
int ret = 0;
int cnt = 0;
unsigned int ulTmpValue,ulReg;
- if(pll->clockType == SECONDARY_PLL)
- {
+ if(pll->clockType == SECONDARY_PLL) {
/* programe secondary pixel clock */
POKE32(CRT_PLL_CTRL,formatPllReg(pll));
POKE32(CRT_HORIZONTAL_TOTAL,
@@ -107,9 +106,9 @@ static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll)
FIELD_SET(0,CRT_DISPLAY_CTRL,PLANE,ENABLE);
- if(getChipType() == SM750LE){
+ if(getChipType() == SM750LE) {
displayControlAdjust_SM750LE(pModeParam,ulTmpValue);
- }else{
+ } else {
ulReg = PEEK32(CRT_DISPLAY_CTRL)
& FIELD_CLEAR(CRT_DISPLAY_CTRL,VSYNC_PHASE)
& FIELD_CLEAR(CRT_DISPLAY_CTRL,HSYNC_PHASE)
@@ -119,9 +118,7 @@ static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll)
POKE32(CRT_DISPLAY_CTRL,ulTmpValue|ulReg);
}
- }
- else if(pll->clockType == PRIMARY_PLL)
- {
+ } else if(pll->clockType == PRIMARY_PLL) {
unsigned int ulReservedBits;
POKE32(PANEL_PLL_CTRL,formatPllReg(pll));
@@ -170,16 +167,14 @@ static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll)
POKE32(PANEL_DISPLAY_CTRL,ulTmpValue|ulReg);
#if 1
- while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulTmpValue|ulReg))
- {
+ while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulTmpValue|ulReg)) {
cnt++;
if(cnt > 1000)
break;
POKE32(PANEL_DISPLAY_CTRL,ulTmpValue|ulReg);
}
#endif
- }
- else{
+ } else {
ret = -1;
}
return ret;
@@ -193,7 +188,7 @@ int ddk750_setModeTiming(mode_parameter_t * parm,clock_type_t clock)
pll.clockType = clock;
uiActualPixelClk = calcPllValue(parm->pixel_clock,&pll);
- if(getChipType() == SM750LE){
+ if(getChipType() == SM750LE) {
/* set graphic mode via IO method */
outb_p(0x88,0x3d4);
outb_p(0x06,0x3d5);
diff --git a/drivers/staging/sm750fb/ddk750_mode.h b/drivers/staging/sm750fb/ddk750_mode.h
index 6f8df96..4133f20 100644
--- a/drivers/staging/sm750fb/ddk750_mode.h
+++ b/drivers/staging/sm750fb/ddk750_mode.h
@@ -3,16 +3,14 @@
#include "ddk750_chip.h"
-typedef enum _spolarity_t
-{
+typedef enum _spolarity_t {
POS = 0, /* positive */
NEG, /* negative */
}
spolarity_t;
-typedef struct _mode_parameter_t
-{
+typedef struct _mode_parameter_t {
/* Horizontal timing. */
unsigned long horizontal_total;
unsigned long horizontal_display_end;
diff --git a/drivers/staging/sm750fb/ddk750_power.c b/drivers/staging/sm750fb/ddk750_power.c
index cbb9767..1ffc8d6 100644
--- a/drivers/staging/sm750fb/ddk750_power.c
+++ b/drivers/staging/sm750fb/ddk750_power.c
@@ -5,10 +5,10 @@
void ddk750_setDPMS(DPMS_t state)
{
unsigned int value;
- if(getChipType() == SM750LE){
+ if(getChipType() == SM750LE) {
value = PEEK32(CRT_DISPLAY_CTRL);
POKE32(CRT_DISPLAY_CTRL,FIELD_VALUE(value,CRT_DISPLAY_CTRL,DPMS,state));
- }else{
+ } else {
value = PEEK32(SYSTEM_CTRL);
value= FIELD_VALUE(value,SYSTEM_CTRL,DPMS,state);
POKE32(SYSTEM_CTRL, value);
@@ -36,8 +36,7 @@ void setPowerMode(unsigned int powerMode)
if(getChipType() == SM750LE)
return;
- switch (powerMode)
- {
+ switch (powerMode) {
case POWER_MODE_CTRL_MODE_MODE0:
control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, MODE0);
break;
@@ -55,16 +54,13 @@ void setPowerMode(unsigned int powerMode)
}
/* Set up other fields in Power Control Register */
- if (powerMode == POWER_MODE_CTRL_MODE_SLEEP)
- {
+ if (powerMode == POWER_MODE_CTRL_MODE_SLEEP) {
control_value =
#ifdef VALIDATION_CHIP
FIELD_SET( control_value, POWER_MODE_CTRL, 336CLK, OFF) |
#endif
FIELD_SET( control_value, POWER_MODE_CTRL, OSC_INPUT, OFF);
- }
- else
- {
+ } else {
control_value =
#ifdef VALIDATION_CHIP
FIELD_SET( control_value, POWER_MODE_CTRL, 336CLK, ON) |
@@ -84,8 +80,7 @@ void setCurrentGate(unsigned int gate)
/* Get current power mode. */
mode = getPowerMode();
- switch (mode)
- {
+ switch (mode) {
case POWER_MODE_CTRL_MODE_MODE0:
gate_reg = MODE0_GATE;
break;
@@ -111,13 +106,10 @@ void enable2DEngine(unsigned int enable)
uint32_t gate;
gate = PEEK32(CURRENT_GATE);
- if (enable)
- {
+ if (enable) {
gate = FIELD_SET(gate, CURRENT_GATE, DE, ON);
gate = FIELD_SET(gate, CURRENT_GATE, CSC, ON);
- }
- else
- {
+ } else {
gate = FIELD_SET(gate, CURRENT_GATE, DE, OFF);
gate = FIELD_SET(gate, CURRENT_GATE, CSC, OFF);
}
@@ -135,8 +127,7 @@ void enableZVPort(unsigned int enable)
/* Enable ZV Port Gate */
gate = PEEK32(CURRENT_GATE);
- if (enable)
- {
+ if (enable) {
gate = FIELD_SET(gate, CURRENT_GATE, ZVPORT, ON);
#if 1
/* Using Software I2C */
@@ -145,9 +136,7 @@ void enableZVPort(unsigned int enable)
/* Using Hardware I2C */
gate = FIELD_SET(gate, CURRENT_GATE, I2C, ON);
#endif
- }
- else
- {
+ } else {
/* Disable ZV Port Gate. There is no way to know whether the GPIO pins are being used
or not. Therefore, do not disable the GPIO gate. */
gate = FIELD_SET(gate, CURRENT_GATE, ZVPORT, OFF);
diff --git a/drivers/staging/sm750fb/ddk750_power.h b/drivers/staging/sm750fb/ddk750_power.h
index 71dc7f9..101eb91e 100644
--- a/drivers/staging/sm750fb/ddk750_power.h
+++ b/drivers/staging/sm750fb/ddk750_power.h
@@ -1,8 +1,7 @@
#ifndef DDK750_POWER_H__
#define DDK750_POWER_H__
-typedef enum _DPMS_t
-{
+typedef enum _DPMS_t {
crtDPMS_ON = 0x0,
crtDPMS_STANDBY = 0x1,
crtDPMS_SUSPEND = 0x2,
diff --git a/drivers/staging/sm750fb/ddk750_sii164.c b/drivers/staging/sm750fb/ddk750_sii164.c
index 3d224d6..66b720f 100644
--- a/drivers/staging/sm750fb/ddk750_sii164.c
+++ b/drivers/staging/sm750fb/ddk750_sii164.c
@@ -139,8 +139,7 @@ long sii164InitChip(
#endif
/* Check if SII164 Chip exists */
- if ((sii164GetVendorID() == SII164_VENDOR_ID) && (sii164GetDeviceID() == SII164_DEVICE_ID))
- {
+ if ((sii164GetVendorID() == SII164_VENDOR_ID) && (sii164GetDeviceID() == SII164_DEVICE_ID)) {
#ifdef DDKDEBUG
//sii164PrintRegisterValues();
@@ -190,8 +189,7 @@ long sii164InitChip(
else
config = SII164_DESKEW_ENABLE;
- switch (deskewSetting)
- {
+ switch (deskewSetting) {
case 0:
config |= SII164_DESKEW_1_STEP;
break;
@@ -297,15 +295,12 @@ void sii164SetPower(
unsigned char config;
config = i2cReadReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION);
- if (powerUp == 1)
- {
+ if (powerUp == 1) {
/* Power up the chip */
config &= ~SII164_CONFIGURATION_POWER_MASK;
config |= SII164_CONFIGURATION_POWER_NORMAL;
i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config);
- }
- else
- {
+ } else {
/* Power down the chip */
config &= ~SII164_CONFIGURATION_POWER_MASK;
config |= SII164_CONFIGURATION_POWER_DOWN;
@@ -325,8 +320,7 @@ static void sii164SelectHotPlugDetectionMode(
unsigned char detectReg;
detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT) & ~SII164_DETECT_MONITOR_SENSE_OUTPUT_FLAG;
- switch (hotPlugMode)
- {
+ switch (hotPlugMode) {
case SII164_HOTPLUG_DISABLE:
detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_HIGH;
break;
diff --git a/drivers/staging/sm750fb/ddk750_sii164.h b/drivers/staging/sm750fb/ddk750_sii164.h
index 2b4c7d3..cecb87d 100644
--- a/drivers/staging/sm750fb/ddk750_sii164.h
+++ b/drivers/staging/sm750fb/ddk750_sii164.h
@@ -4,8 +4,7 @@
#define USE_DVICHIP
/* Hot Plug detection mode structure */
-typedef enum _sii164_hot_plug_mode_t
-{
+typedef enum _sii164_hot_plug_mode_t {
SII164_HOTPLUG_DISABLE = 0, /* Disable Hot Plug output bit (always high). */
SII164_HOTPLUG_USE_MDI, /* Use Monitor Detect Interrupt bit. */
SII164_HOTPLUG_USE_RSEN, /* Use Receiver Sense detect bit. */
diff --git a/drivers/staging/sm750fb/ddk750_swi2c.c b/drivers/staging/sm750fb/ddk750_swi2c.c
index 901b373..7683daa 100644
--- a/drivers/staging/sm750fb/ddk750_swi2c.c
+++ b/drivers/staging/sm750fb/ddk750_swi2c.c
@@ -100,8 +100,7 @@ static void swI2CWait(void)
#else
int i, Temp;
- for(i=0; i<600; i++)
- {
+ for(i=0; i<600; i++) {
Temp = i;
Temp += i;
}
@@ -126,14 +125,11 @@ void swI2CSCL(unsigned char value)
unsigned long ulGPIODirection;
ulGPIODirection = PEEK32(g_i2cClkGPIODataDirReg);
- if (value) /* High */
- {
+ if (value) { /* High */
/* Set direction as input. This will automatically pull the signal up. */
ulGPIODirection &= ~(1 << g_i2cClockGPIO);
POKE32(g_i2cClkGPIODataDirReg, ulGPIODirection);
- }
- else /* Low */
- {
+ } else { /* Low */
/* Set the signal down */
ulGPIOData = PEEK32(g_i2cClkGPIODataReg);
ulGPIOData &= ~(1 << g_i2cClockGPIO);
@@ -163,14 +159,11 @@ void swI2CSDA(unsigned char value)
unsigned long ulGPIODirection;
ulGPIODirection = PEEK32(g_i2cDataGPIODataDirReg);
- if (value) /* High */
- {
+ if (value) { /* High */
/* Set direction as input. This will automatically pull the signal up. */
ulGPIODirection &= ~(1 << g_i2cDataGPIO);
POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection);
- }
- else /* Low */
- {
+ } else { /* Low */
/* Set the signal down */
ulGPIOData = PEEK32(g_i2cDataGPIODataReg);
ulGPIOData &= ~(1 << g_i2cDataGPIO);
@@ -195,8 +188,7 @@ static unsigned char swI2CReadSDA(void)
/* Make sure that the direction is input (High) */
ulGPIODirection = PEEK32(g_i2cDataGPIODataDirReg);
- if ((ulGPIODirection & (1 << g_i2cDataGPIO)) != (~(1 << g_i2cDataGPIO)))
- {
+ if ((ulGPIODirection & (1 << g_i2cDataGPIO)) != (~(1 << g_i2cDataGPIO))) {
ulGPIODirection &= ~(1 << g_i2cDataGPIO);
POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection);
}
@@ -255,8 +247,7 @@ static long swI2CWriteByte(unsigned char data)
int i;
/* Sending the data bit by bit */
- for (i=0; i<8; i++)
- {
+ for (i=0; i<8; i++) {
/* Set SCL to low */
swI2CSCL(0);
@@ -286,8 +277,7 @@ static long swI2CWriteByte(unsigned char data)
swI2CWait();
/* Read SDA, until SDA==0 */
- for(i=0; i<0xff; i++)
- {
+ for(i=0; i<0xff; i++) {
if (!swI2CReadSDA())
break;
@@ -322,8 +312,7 @@ static unsigned char swI2CReadByte(unsigned char ack)
int i;
unsigned char data = 0;
- for(i=7; i>=0; i--)
- {
+ for(i=7; i>=0; i--) {
/* Set the SCL to Low and SDA to High (Input) */
swI2CSCL(0);
swI2CSDA(1);
@@ -510,8 +499,7 @@ long swI2CWriteReg(
*/
if ((swI2CWriteByte(deviceAddress) != 0) ||
(swI2CWriteByte(registerIndex) != 0) ||
- (swI2CWriteByte(data) != 0))
- {
+ (swI2CWriteByte(data) != 0)) {
returnValue = -1;
}
diff --git a/drivers/staging/sm750fb/sm750.h b/drivers/staging/sm750fb/sm750.h
index 0847d2b..aef1a2f 100644
--- a/drivers/staging/sm750fb/sm750.h
+++ b/drivers/staging/sm750fb/sm750.h
@@ -56,7 +56,7 @@ struct lynx_share{
struct{
int vram;
int vram_added;
- }mtrr;
+ } mtrr;
#endif
/* all smi graphic adaptor got below attributes */
unsigned long vidmem_start;
diff --git a/drivers/staging/sm750fb/sm750_accel.c b/drivers/staging/sm750fb/sm750_accel.c
index c5a3726..eafae89 100644
--- a/drivers/staging/sm750fb/sm750_accel.c
+++ b/drivers/staging/sm750fb/sm750_accel.c
@@ -96,8 +96,7 @@ int hw_fillrect(struct lynx_accel * accel,
{
u32 deCtrl;
- if(accel->de_wait() != 0)
- {
+ if(accel->de_wait() != 0) {
/* int time wait and always busy,seems hardware
* got something error */
pr_debug("%s:De engine always bussy\n",__func__);
@@ -159,11 +158,9 @@ unsigned int rop2) /* ROP value */
de_ctrl = 0;
/* If source and destination are the same surface, need to check for overlay cases */
- if (sBase == dBase && sPitch == dPitch)
- {
+ if (sBase == dBase && sPitch == dPitch) {
/* Determine direction of operation */
- if (sy < dy)
- {
+ if (sy < dy) {
/* +----------+
|S |
| +----------+
@@ -174,9 +171,7 @@ unsigned int rop2) /* ROP value */
+----------+ */
nDirection = BOTTOM_TO_TOP;
- }
- else if (sy > dy)
- {
+ } else if (sy > dy) {
/* +----------+
|D |
| +----------+
@@ -187,13 +182,10 @@ unsigned int rop2) /* ROP value */
+----------+ */
nDirection = TOP_TO_BOTTOM;
- }
- else
- {
+ } else {
/* sy == dy */
- if (sx <= dx)
- {
+ if (sx <= dx) {
/* +------+---+------+
|S | | D|
| | | |
@@ -202,9 +194,7 @@ unsigned int rop2) /* ROP value */
+------+---+------+ */
nDirection = RIGHT_TO_LEFT;
- }
- else
- {
+ } else {
/* sx > dx */
/* +------+---+------+
@@ -219,8 +209,7 @@ unsigned int rop2) /* ROP value */
}
}
- if ((nDirection == BOTTOM_TO_TOP) || (nDirection == RIGHT_TO_LEFT))
- {
+ if ((nDirection == BOTTOM_TO_TOP) || (nDirection == RIGHT_TO_LEFT)) {
sx += width - 1;
sy += height - 1;
dx += width - 1;
@@ -248,15 +237,14 @@ unsigned int rop2) /* ROP value */
Note that input pitch is BYTE value, but the 2D Pitch register uses
pixel values. Need Byte to pixel convertion.
*/
- if(Bpp == 3){
+ if(Bpp == 3) {
sx *= 3;
dx *= 3;
width *= 3;
write_dpr(accel,DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch) |
FIELD_VALUE(0, DE_PITCH, SOURCE, sPitch));//dpr10
- }
- else
+ } else
#endif
{
write_dpr(accel,DE_PITCH,
@@ -271,9 +259,8 @@ unsigned int rop2) /* ROP value */
FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, (dPitch/Bpp)) |
FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, (sPitch/Bpp)));//dpr3c
- if (accel->de_wait() != 0){
+ if (accel->de_wait() != 0)
return -1;
- }
{
@@ -344,8 +331,7 @@ int hw_imageblit(struct lynx_accel *accel,
ul4BytesPerScan = ulBytesPerScan & ~3;
ulBytesRemain = ulBytesPerScan & 3;
- if(accel->de_wait() != 0)
- {
+ if(accel->de_wait() != 0) {
// inf_msg("*** ImageBlit return -1 ***\n");
return -1;
}
@@ -364,7 +350,7 @@ int hw_imageblit(struct lynx_accel *accel,
Note that input pitch is BYTE value, but the 2D Pitch register uses
pixel values. Need Byte to pixel convertion.
*/
- if(bytePerPixel == 3 ){
+ if(bytePerPixel == 3 ) {
dx *= 3;
width *= 3;
startBit *= 3;
@@ -372,8 +358,7 @@ int hw_imageblit(struct lynx_accel *accel,
FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch) |
FIELD_VALUE(0, DE_PITCH, SOURCE, dPitch));//dpr10
- }
- else
+ } else
#endif
{
write_dpr(accel,DE_PITCH,
@@ -415,16 +400,12 @@ int hw_imageblit(struct lynx_accel *accel,
write_dpr(accel,DE_CONTROL, de_ctrl | deGetTransparency(accel));
/* Write MONO data (line by line) to 2D Engine data port */
- for (i=0; i<height; i++)
- {
+ for (i=0; i<height; i++) {
/* For each line, send the data in chunks of 4 bytes */
for (j=0; j<(ul4BytesPerScan/4); j++)
- {
write_dpPort(accel, *(unsigned int *)(pSrcbuf + (j * 4)));
- }
- if (ulBytesRemain)
- {
+ if (ulBytesRemain) {
memcpy(ajRemain, pSrcbuf+ul4BytesPerScan, ulBytesRemain);
write_dpPort(accel, *(unsigned int *)ajRemain);
}
diff --git a/drivers/staging/sm750fb/sm750_cursor.c b/drivers/staging/sm750fb/sm750_cursor.c
index 68d5cbc..666b773 100644
--- a/drivers/staging/sm750fb/sm750_cursor.c
+++ b/drivers/staging/sm750fb/sm750_cursor.c
@@ -122,8 +122,7 @@ void hw_cursor_setData(struct lynx_cursor * cursor,
odd=0;
*/
- for(i=0;i<count;i++)
- {
+ for(i=0;i<count;i++) {
color = *pcol++;
mask = *pmsk++;
data = 0;
@@ -137,20 +136,19 @@ void hw_cursor_setData(struct lynx_cursor * cursor,
else
opr = mask & color;
- for(j=0;j<8;j++)
- {
+ for(j=0;j<8;j++) {
- if(opr & (0x80 >> j))
- { //use fg color,id = 2
+ if(opr & (0x80 >> j)) {
+ //use fg color,id = 2
data |= 2 << (j*2);
- }else{
+ } else {
//use bg color,id = 1
data |= 1 << (j*2);
}
}
#else
- for(j=0;j<8;j++){
- if(mask & (0x80>>j)){
+ for(j=0;j<8;j++) {
+ if(mask & (0x80>>j)) {
if(rop == ROP_XOR)
opr = mask ^ color;
else
@@ -173,7 +171,7 @@ void hw_cursor_setData(struct lynx_cursor * cursor,
/* need a return */
pstart += offset;
pbuffer = pstart;
- }else{
+ } else {
pbuffer += sizeof(u16);
}
@@ -204,8 +202,7 @@ void hw_cursor_setData2(struct lynx_cursor * cursor,
pstart = cursor->vstart;
pbuffer = pstart;
- for(i=0;i<count;i++)
- {
+ for(i=0;i<count;i++) {
color = *pcol++;
mask = *pmsk++;
data = 0;
@@ -217,19 +214,17 @@ void hw_cursor_setData2(struct lynx_cursor * cursor,
else
opr = mask & color;
- for(j=0;j<8;j++)
- {
+ for(j=0;j<8;j++) {
- if(opr & (0x80 >> j))
- { //use fg color,id = 2
+ if(opr & (0x80 >> j)) { //use fg color,id = 2
data |= 2 << (j*2);
- }else{
+ } else {
//use bg color,id = 1
data |= 1 << (j*2);
}
}
#else
- for(j=0;j<8;j++){
+ for(j=0;j<8;j++) {
if(mask & (1<<j))
data |= ((color & (1<<j))?1:2)<<(j*2);
}
@@ -243,7 +238,7 @@ void hw_cursor_setData2(struct lynx_cursor * cursor,
/* need a return */
pstart += offset;
pbuffer = pstart;
- }else{
+ } else {
pbuffer += sizeof(u16);
}
diff --git a/drivers/staging/sm750fb/sm750_hw.c b/drivers/staging/sm750fb/sm750_hw.c
index 9f0d06d..29c73b7 100644
--- a/drivers/staging/sm750fb/sm750_hw.c
+++ b/drivers/staging/sm750fb/sm750_hw.c
@@ -44,19 +44,18 @@ int hw_sm750_map(struct lynx_share* share, struct pci_dev* pdev)
* successfully
* */
- if((ret = pci_request_region(pdev, 1, "sm750fb")))
- {
+ if((ret = pci_request_region(pdev, 1, "sm750fb"))) {
pr_err("Can not request PCI regions.\n");
goto exit;
}
/* now map mmio and vidmem*/
share->pvReg = ioremap_nocache(share->vidreg_start, share->vidreg_size);
- if(!share->pvReg){
+ if(!share->pvReg) {
pr_err("mmio failed\n");
ret = -EFAULT;
goto exit;
- }else{
+ } else {
pr_info("mmio virtual addr = %p\n", share->pvReg);
}
@@ -78,8 +77,7 @@ int hw_sm750_map(struct lynx_share* share, struct pci_dev* pdev)
/* reserve the vidmem space of smi adaptor */
#if 0
- if((ret = pci_request_region(pdev,0,_moduleName_)))
- {
+ if((ret = pci_request_region(pdev,0,_moduleName_))) {
pr_err("Can not request PCI regions.\n");
goto exit;
}
@@ -88,11 +86,11 @@ int hw_sm750_map(struct lynx_share* share, struct pci_dev* pdev)
share->pvMem = ioremap(share->vidmem_start,
share->vidmem_size);
- if(!share->pvMem){
+ if(!share->pvMem) {
pr_err("Map video memory failed\n");
ret = -EFAULT;
goto exit;
- }else{
+ } else {
pr_info("video memory vaddr = %p\n", share->pvMem);
}
exit:
@@ -120,7 +118,7 @@ int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev)
ddk750_initHw((initchip_param_t *)&spec_share->state.initParm);
/* for sm718,open pci burst */
- if(share->devid == 0x718){
+ if(share->devid == 0x718) {
POKE32(SYSTEM_CTRL,
FIELD_SET(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, PCI_BURST, ON));
}
@@ -131,10 +129,9 @@ int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev)
ddk750_initDVIDisp();
#endif
- if(getChipType() != SM750LE)
- {
+ if(getChipType() != SM750LE) {
/* does user need CRT ?*/
- if(spec_share->state.nocrt){
+ if(spec_share->state.nocrt) {
POKE32(MISC_CTRL,
FIELD_SET(PEEK32(MISC_CTRL),
MISC_CTRL,
@@ -144,7 +141,7 @@ int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev)
FIELD_SET(PEEK32(SYSTEM_CTRL),
SYSTEM_CTRL,
DPMS, VNHN));
- }else{
+ } else {
POKE32(MISC_CTRL,
FIELD_SET(PEEK32(MISC_CTRL),
MISC_CTRL,
@@ -156,7 +153,7 @@ int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev)
DPMS, VPHP));
}
- switch (spec_share->state.pnltype){
+ switch (spec_share->state.pnltype) {
case sm750_doubleTFT:
case sm750_24TFT:
case sm750_dualTFT:
@@ -167,7 +164,7 @@ int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev)
spec_share->state.pnltype));
break;
}
- }else{
+ } else {
/* for 750LE ,no DVI chip initilization makes Monitor no signal */
/* Set up GPIO for software I2C to program DVI chip in the
Xilinx SP605 board, in order to have video signal.
@@ -178,8 +175,7 @@ int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev)
/* Customer may NOT use CH7301 DVI chip, which has to be
initialized differently.
*/
- if (swI2CReadReg(0xec, 0x4a) == 0x95)
- {
+ if (swI2CReadReg(0xec, 0x4a) == 0x95) {
/* The following register values for CH7301 are from
Chrontel app note and our experiment.
*/
@@ -192,7 +188,7 @@ int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev)
}
/* init 2d engine */
- if(!share->accel_off){
+ if(!share->accel_off) {
hw_sm750_initAccel(share);
// share->accel.de_wait = hw_sm750_deWait;
}
@@ -230,15 +226,15 @@ int hw_sm750_output_setMode(struct lynxfb_output* output,
channel = *output->channel;
- if(getChipType() != SM750LE){
- if(channel == sm750_primary){
+ if(getChipType() != SM750LE) {
+ if(channel == sm750_primary) {
pr_info("primary channel\n");
if(output->paths & sm750_panel)
dispSet |= do_LCD1_PRI;
if(output->paths & sm750_crt)
dispSet |= do_CRT_PRI;
- }else{
+ } else {
pr_info("secondary channel\n");
if(output->paths & sm750_panel)
dispSet |= do_LCD1_SEC;
@@ -247,7 +243,7 @@ int hw_sm750_output_setMode(struct lynxfb_output* output,
}
ddk750_setLogicalDispOut(dispSet);
- }else{
+ } else {
/* just open DISPLAY_CONTROL_750LE register bit 3:0*/
u32 reg;
reg = PEEK32(DISPLAY_CONTROL_750LE);
@@ -272,7 +268,7 @@ int hw_sm750_crtc_checkMode(struct lynxfb_crtc* crtc, struct fb_var_screeninfo*
share = container_of(crtc, struct lynxfb_par,crtc)->share;
- switch (var->bits_per_pixel){
+ switch (var->bits_per_pixel) {
case 8:
case 16:
break;
@@ -310,9 +306,9 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc,
par = container_of(crtc, struct lynxfb_par, crtc);
share = par->share;
#if 1
- if(!share->accel_off){
+ if(!share->accel_off) {
/* set 2d engine pixel format according to mode bpp */
- switch(var->bits_per_pixel){
+ switch(var->bits_per_pixel) {
case 8:
fmt = 0;
break;
@@ -351,12 +347,12 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc,
pr_debug("Request pixel clock = %lu\n", modparm.pixel_clock);
ret = ddk750_setModeTiming(&modparm, clock);
- if(ret){
+ if(ret) {
pr_err("Set mode timing failed\n");
goto exit;
}
- if(crtc->channel != sm750_secondary){
+ if(crtc->channel != sm750_secondary) {
/* set pitch, offset ,width,start address ,etc... */
POKE32(PANEL_FB_ADDRESS,
FIELD_SET(0, PANEL_FB_ADDRESS, STATUS, CURRENT)|
@@ -392,7 +388,7 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc,
PANEL_DISPLAY_CTRL, FORMAT,
(var->bits_per_pixel >> 4)
));
- }else{
+ } else {
/* not implemented now */
POKE32(CRT_FB_ADDRESS, crtc->oScreen);
reg = var->xres * (var->bits_per_pixel >> 3);
@@ -429,11 +425,11 @@ int hw_sm750_setColReg(struct lynxfb_crtc* crtc, ushort index,
return 0;
}
-int hw_sm750le_setBLANK(struct lynxfb_output * output, int blank){
+int hw_sm750le_setBLANK(struct lynxfb_output * output, int blank)
+{
int dpms,crtdb;
- switch(blank)
- {
+ switch(blank) {
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
case FB_BLANK_UNBLANK:
#else
@@ -476,7 +472,7 @@ int hw_sm750le_setBLANK(struct lynxfb_output * output, int blank){
return -EINVAL;
}
- if(output->paths & sm750_crt){
+ if(output->paths & sm750_crt) {
POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, DPMS, dpms));
POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb));
}
@@ -489,8 +485,7 @@ int hw_sm750_setBLANK(struct lynxfb_output* output,int blank)
dpms = pps = crtdb = 0;
- switch (blank)
- {
+ switch (blank) {
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
case FB_BLANK_UNBLANK:
#else
@@ -538,15 +533,14 @@ int hw_sm750_setBLANK(struct lynxfb_output* output,int blank)
break;
}
- if(output->paths & sm750_crt){
+ if(output->paths & sm750_crt) {
POKE32(SYSTEM_CTRL,FIELD_VALUE(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, DPMS, dpms));
POKE32(CRT_DISPLAY_CTRL,FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL,BLANK, crtdb));
}
- if(output->paths & sm750_panel){
+ if(output->paths & sm750_panel)
POKE32(PANEL_DISPLAY_CTRL, FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, DATA, pps));
- }
return 0;
}
@@ -557,7 +551,7 @@ void hw_sm750_initAccel(struct lynx_share * share)
u32 reg;
enable2DEngine(1);
- if(getChipType() == SM750LE){
+ if(getChipType() == SM750LE) {
reg = PEEK32(DE_STATE1);
reg = FIELD_SET(reg, DE_STATE1, DE_ABORT,ON);
POKE32(DE_STATE1,reg);
@@ -566,7 +560,7 @@ void hw_sm750_initAccel(struct lynx_share * share)
reg = FIELD_SET(reg, DE_STATE1, DE_ABORT,OFF);
POKE32(DE_STATE1, reg);
- }else{
+ } else {
/* engine reset */
reg = PEEK32(SYSTEM_CTRL);
reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT,ON);
@@ -584,14 +578,12 @@ void hw_sm750_initAccel(struct lynx_share * share)
int hw_sm750le_deWait(void)
{
int i=0x10000000;
- while(i--){
+ while(i--) {
unsigned int dwVal = PEEK32(DE_STATE2);
if((FIELD_GET(dwVal, DE_STATE2, DE_STATUS) == DE_STATE2_DE_STATUS_IDLE) &&
(FIELD_GET(dwVal, DE_STATE2, DE_FIFO) == DE_STATE2_DE_FIFO_EMPTY) &&
(FIELD_GET(dwVal, DE_STATE2, DE_MEM_FIFO) == DE_STATE2_DE_MEM_FIFO_EMPTY))
- {
return 0;
- }
}
/* timeout error */
return -1;
@@ -601,14 +593,12 @@ int hw_sm750le_deWait(void)
int hw_sm750_deWait(void)
{
int i=0x10000000;
- while(i--){
+ while(i--) {
unsigned int dwVal = PEEK32(SYSTEM_CTRL);
if((FIELD_GET(dwVal,SYSTEM_CTRL,DE_STATUS) == SYSTEM_CTRL_DE_STATUS_IDLE) &&
(FIELD_GET(dwVal,SYSTEM_CTRL,DE_FIFO) == SYSTEM_CTRL_DE_FIFO_EMPTY) &&
(FIELD_GET(dwVal,SYSTEM_CTRL,DE_MEM_FIFO) == SYSTEM_CTRL_DE_MEM_FIFO_EMPTY))
- {
return 0;
- }
}
/* timeout error */
return -1;
--
2.1.4
--
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