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Message-ID: <20150410100832.GB6854@e104818-lin.cambridge.arm.com>
Date:	Fri, 10 Apr 2015 11:08:33 +0100
From:	Catalin Marinas <catalin.marinas@....com>
To:	Arnd Bergmann <arnd@...db.de>
Cc:	Kumar Gala <galak@...eaurora.org>, devicetree@...r.kernel.org,
	linux-arm-msm@...r.kernel.org, will.deacon@....com,
	linux-kernel@...r.kernel.org, arm@...nel.org,
	Abhimanyu Kapur <abhimany@...eaurora.org>,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [RFC PATCH 5/5] arm64: qcom: add cpu operations

On Thu, Apr 09, 2015 at 11:19:02PM +0200, Arnd Bergmann wrote:
> On Thursday 09 April 2015 12:37:11 Kumar Gala wrote:
> > From: Abhimanyu Kapur <abhimany@...eaurora.org>
> > 
> > Add qcom cpu operations for arm-v8 cpus. Implement secondary cpu boot ops
> > As a part of this change update device tree documentation for:
> > 
> > 1. Arm cortex-a ACC device which provides percpu reg
> > 2. Armv8 cortex-a compatible string in arm/cpus.txt
> > 
> > Signed-off-by: Abhimanyu Kapur <abhimany@...eaurora.org>
> > Signed-off-by: Kumar Gala <galak@...eaurora.org>
> > ---
> >  Documentation/devicetree/bindings/arm/cpus.txt    |   2 +
> >  Documentation/devicetree/bindings/arm/msm/acc.txt |  19 ++
> >  drivers/soc/qcom/Makefile                         |   1 +
> >  drivers/soc/qcom/cpu_ops.c                        | 343 ++++++++++++++++++++++
> >  4 files changed, 365 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/arm/msm/acc.txt
> 
> I don't want this in drivers/soc. Please find a way to integrate it into the
> arch/arm64 code.

And rename it to something like qc-special-cpu-ops-dont-copy-this.c

-- 
Catalin
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