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Message-ID: <alpine.DEB.2.11.1504211101200.13914@nanos>
Date: Tue, 21 Apr 2015 11:16:54 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Fenghua Yu <fenghua.yu@...el.com>
cc: "H. Peter Anvin" <hpa@...ux.intel.com>,
Ingo Molnar <mingo@...nel.org>,
Asit K Mallick <asit.k.mallick@...el.com>,
Dave Hansen <dave.hansen@...el.com>,
Glenn Williamson <glenn.p.williamson@...el.com>,
linux-kernel <linux-kernel@...r.kernel.org>, x86 <x86@...nel.org>
Subject: Re: [PATCH Bugfix 1/4] x86/xsave.c: Fix xstate offsets and sizes
enumeration
On Sat, 18 Apr 2015, Fenghua Yu wrote:
> From: Fenghua Yu <fenghua.yu@...el.com>
>
> When enumerating xstate offsets and sizes from cpuid (eax=0x0d, ecx>=2),
> it's possible that state m is not implemented while state n (n>m)
> is implemented. So enumeration shouldn't stop at state m.
>
> There is no platform configured like above yet. But this could be a problem
> in the future.
So this is for future hardware. Why are you claiming this is a BUGFIX?
This is a regular hardware enablement or are you saying that this is
backport material?
Confused.
tglx
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