linux-kernel - Re: [Linux-nvdimm] [PATCH 04/21] nd: create an 'nd_bus' from an 'nfit

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Message-ID: <1429731538.16996.32.camel@misato.fc.hp.com>
Date:	Wed, 22 Apr 2015 13:38:58 -0600
From:	Toshi Kani <toshi.kani@...com>
To:	Dan Williams <dan.j.williams@...el.com>
Cc:	Linda Knippers <linda.knippers@...com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-nvdimm@...ts.01.org" <linux-nvdimm@...ts.01.org>
Subject: Re: [Linux-nvdimm] [PATCH 04/21] nd: create an 'nd_bus' from an
 'nfit_desc'

On Wed, 2015-04-22 at 12:28 -0700, Dan Williams wrote:
> On Wed, Apr 22, 2015 at 11:23 AM, Toshi Kani <toshi.kani@...com> wrote:
> > On Wed, 2015-04-22 at 11:20 -0700, Dan Williams wrote:
> >> On Wed, Apr 22, 2015 at 11:00 AM, Linda Knippers <linda.knippers@...com> wrote:
> >> Wait, point of clarification, DCRs (dimm-control-regions) have RFICs,
> >> not MEMDEVs (memory-device-to-spa-mapping).  Toshi's original report
> >> was that an NFIT with a SPA+MEMDEV was failing to enable a PMEM
> >> device.  That specific problem can be fixed by either deleting the
> >> MEMDEV, or adding a DCR.
> >
> > By a DCR, do you mean a DCR structure or SPA with Control Region GUID?
> 
> Hmm, I meant a DCR as defined below.  I agree you would not need a "SPA-DCR".
> 
> > Adding a DCR structure does not solve this issue since it requires SPA
> > with Control Region GUID, which battery-backed DIMMs do not have.
> 
> I would not go that far, half of a DCR entry is relevant for any
> NVDIMM, and half is only relevant if a DIMM offers BLK access:
> 
> struct acpi_nfit_dcr {
>         u16 type;
>         u16 length;
>         u16 dcr_index;
>         u16 vendor_id;
>         u16 device_id;
>         u16 revision_id;
>         u16 sub_vendor_id;
>         u16 sub_device_id;
>         u16 sub_revision_id;
>         u8 reserved[6];
>         u32 serial_number;
>         u16 fic;
> <<<<< BLK relevant fields start here <<<<<
>         u16 num_bcw;
>         u64 bcw_size;
>         u64 cmd_offset;
>         u64 cmd_size;
>         u64 status_offset;
>         u64 status_size;
>         u16 flags;
>         u8 reserved2[6];
> };

Yes, we do have a DCR entry.  But we do not have a SPA-DCR.

The previous issue I reported to nd_mem_init() was caused by the fact
that there was no "SPA-DCR".  nd_mem_init() requires SPA-DCR to
initialize nd_mem objects.

> >> Of course, if you add a DCR with a different intended DSM layout than
> >> the DSM-example-interface the driver will need to add support for
> >> handling that case.
> >
> > Yes, we consider to add different _DSMs for management.  We do not need
> > the nd_acpi driver to support it now, but we need this framework to work
> > without the DSM-example-interface present.
> >
> 
> One possible workaround is that I could ignore MEMDEV entries that do
> not have a corresponding DCR.  This would enable nd_namespace_io
> devices to be surfaced for your use case.  Would that work for you?
> I.e. do you need the nfit_handle exposed?

We have MEMDEV entries and their corresponding DCR entries.  ACPI 6.0
states that NVDIMM control region structure index must contain a
non-zero value in a MEMDEV entry, so I think they must correspond.

Yes, we need this framework to enumerate all entries.

Thanks,
-Toshi



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