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Message-ID: <alpine.DEB.2.11.1504232211540.13914@nanos>
Date: Thu, 23 Apr 2015 22:21:11 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Steven Rostedt <rostedt@...dmis.org>
cc: linux-kernel@...r.kernel.org, linux-rt-users@...r.kernel.org,
Ingo Molnar <mingo@...nel.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Peter Zijlstra <peterz@...radead.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Carsten Emde <C.Emde@...dl.org>,
Daniel Wagner <wagi@...om.org>, Jon Masters <jcm@...hat.com>,
Clark Williams <williams@...hat.com>
Subject: Re: [RFC][PATCH 0/4] tracing: Add new hwlat_detector tracer
On Thu, 23 Apr 2015, Steven Rostedt wrote:
> On Thu, 23 Apr 2015 21:51:47 +0200 (CEST)
> Thomas Gleixner <tglx@...utronix.de> wrote:
>
> > That's fine, but this still lacks a detection of NMI
> > disturbance. We've seen false positives reported over and over when
> > stuff like the NMI watchdog or perf was enabled while running this.
>
> I was waiting for someone to point that out :-)
Always to your service :)
> Is the NMI code generic enough now to know that an NMI triggered, and
> we could detect that and ignore the latencies if one did. Or perhaps
> even add a tracepoint in the start and end of an NMI, to account for
> it, (add hooks there), in case there's any SMIs that sneak in after an
> NMI.
There are tracepoints in nmi_enter() and nmi_exit() at least in the
kernel source I'm looking at.
> I guess I could also add an NMI notifier to let me know. But I know how
> much everyone loves notifiers :-)
I was tempted to tell you to shoot yourself, but realized in time
that this would be politically incorrect.
> >
> > Aside of that isn't there a way to detect SMI crap with performance
> > counters on recent hardware?
> >
>
> Nothing I know of that is generic enough. And just because an SMI
> triggers, doesn't mean it's bad if it is quick enough. We have had
> arguments with HW vendors about their SMIs, and used the hwlat_detector
> to show that their SMIs are not as innocent as they claim. But we also
> have seen SMIs trigger under 1us, where it doesn't affect the system.
I know of a SMI event counter which is available on newer CPUs and
Intel promised to add a SMI cycle counter as well. I have no idea
whether that one ever materialized. PeterZ should know.
But at least on the machines which have the event counter it would be
usefull to include that information as well.
Thanks,
tglx
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