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Message-Id: <1429885164-28501-2-git-send-email-albeu@free.fr>
Date:	Fri, 24 Apr 2015 16:19:21 +0200
From:	Alban Bedel <albeu@...e.fr>
To:	linux-spi@...r.kernel.org
Cc:	Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Ralf Baechle <ralf@...ux-mips.org>,
	Mark Brown <broonie@...nel.org>, Alban Bedel <albeu@...e.fr>,
	Gabor Juhos <juhosg@...nwrt.org>, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-mips@...ux-mips.org
Subject: [PATCH 1/4] devicetree: add binding documentation for the AR7100 SPI controller

Signed-off-by: Alban Bedel <albeu@...e.fr>
---
 .../devicetree/bindings/spi/spi-ath79.txt          | 24 ++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-ath79.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-ath79.txt b/Documentation/devicetree/bindings/spi/spi-ath79.txt
new file mode 100644
index 0000000..f1ad9c3
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-ath79.txt
@@ -0,0 +1,24 @@
+Binding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller
+
+Required properties:
+- compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback.
+- reg: Base address and size of the controllers memory area
+- clocks: phandle to the AHB clock.
+- clock-names: has to be "ahb".
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+
+Child nodes as per the generic SPI binding.
+
+Example:
+
+	spi@...00000 {
+		compatible = "qca,ar9132-spi", "qca,ar7100-spi";
+		reg = <0x1F000000 0x10>;
+
+		clocks = <&pll 2>;
+		clock-names = "ahb";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
-- 
2.0.0

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