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Message-id: <1430134597-14668-8-git-send-email-cw00.choi@samsung.com>
Date:	Mon, 27 Apr 2015 20:36:34 +0900
From:	Chanwoo Choi <cw00.choi@...sung.com>
To:	s.nawrocki@...sung.com, tomasz.figa@...il.com,
	mturquette@...aro.org
Cc:	kgene@...nel.org, inki.dae@...sung.com, chanho61.park@...sung.com,
	cw00.choi@...sung.com, linux-samsung-soc@...r.kernel.org,
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
	Hyungwon Hwang <human.hwang@...sung.com>
Subject: [PATCH v3 07/10] clk: samsung: exynos5433: Add DIV_CPIF to store it
 when the board is being suspended

From: Hyungwon Hwang <human.hwang@...sung.com>

This register must be stored when the device is suspended, and must be restored
when it is back. This patch adds the register to the list of storing registers.

Signed-off-by: Hyungwon Hwang <human.hwang@...sung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@...sung.com>
---
 drivers/clk/samsung/clk-exynos5433.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
index e4a6771..5d8b4a8 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -835,6 +835,7 @@ static unsigned long cpif_clk_regs[] __initdata = {
 	MPHY_PLL_CON1,
 	MPHY_PLL_FREQ_DET,
 	MUX_SEL_CPIF0,
+	DIV_CPIF,
 	ENABLE_SCLK_CPIF,
 };
 
-- 
1.8.5.5

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