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Message-ID: <CAFEAcA85i_1JybEFBg91NA3-LpAzYh4RSDnqryOd=rZN7gZP5A@mail.gmail.com>
Date: Tue, 28 Apr 2015 10:34:12 +0100
From: Peter Maydell <peter.maydell@...aro.org>
To: Alex Bennée <alex.bennee@...aro.org>
Cc: Christoffer Dall <christoffer.dall@...aro.org>,
kvm-devel <kvm@...r.kernel.org>,
arm-mail-list <linux-arm-kernel@...ts.infradead.org>,
"kvmarm@...ts.cs.columbia.edu" <kvmarm@...ts.cs.columbia.edu>,
Marc Zyngier <marc.zyngier@....com>,
Alexander Graf <agraf@...e.de>,
Andrew Jones <drjones@...hat.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Zhichao Huang <zhichao.huang@...aro.org>,
"J. Kiszka" <jan.kiszka@...mens.com>,
David Hildenbrand <dahi@...ux.vnet.ibm.com>,
Bharat Bhushan <r65777@...escale.com>, bp@...e.de,
Gleb Natapov <gleb@...nel.org>,
Jonathan Corbet <corbet@....net>,
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Subject: Re: [PATCH v2 06/10] KVM: arm64: guest debug, add SW break point support
On 28 April 2015 at 09:42, Alex Bennée <alex.bennee@...aro.org> wrote:
> Peter Maydell <peter.maydell@...aro.org> writes:
>> Does the kernel already have a conveniently implemented "inject
>> exception into guest" lump of code? If so it might be less effort
>> to do it that way round, maybe.
>
> So you pointed out we can't just re-inject the exceptions we get as we
> need to map from things like ESR_ELx_EC_WATCHPT_LOW to
> ESR_ELx_EC_WATCHPT_CUR before re-injection.
>
> Of course if it is as simple as modifying the ESR_EL1 register and
> returning +ve in the handle_exit path then I can do that but I assumed
> if any other wrangling needs doing it should be done in userspace.
Well, somebody's got to do it, and it's the same amount of work
either way (fiddling with ESR, making sure we direct the guest
to the right exception vector entry point, maybe a few other
things).
-- PMM
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