linux-kernel - Re: [PATCHv3 10/12] usb: dwc3: add ULPI interface support

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Message-ID: <20150430103422.GB1372@kuha.fi.intel.com>
Date:	Thu, 30 Apr 2015 13:34:22 +0300
From:	Heikki Krogerus <heikki.krogerus@...ux.intel.com>
To:	Felipe Balbi <balbi@...com>
Cc:	David Cohen <david.a.cohen@...ux.intel.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Baolu Lu <baolu.lu@...ux.intel.com>,
	Paul Bolle <pebolle@...cali.nl>, linux-usb@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCHv3 10/12] usb: dwc3: add ULPI interface support

Hi Felipe,

> > +	case DWC3_GHWPARAMS3_HSPHY_IFC_ULPI:
> > +		/* Soft reset here to sync the clocks */
> > +		ret = dwc3_soft_reset(dwc);
> 
> you just lost all DWC3_GUSB3PIPECTL(0) and DWC3_GUSB2PHYCFG(0)
> configurations which happened right before this switch. Essentially
> breaking anybody who needs any of those extra bits enabled even though
> they're not enabled by default.

Is this a problem we have with DWC3 cores older then 1.94? I don't
know anything about those. If it is, then I would imagine we just need
to soft reset here conditionally, only cores >= 1.94a, right?

With 1.94a and newer, DWC3_GUSB3PIPECTL(0) and DWC3_GUSB2PHYCFG(0)
keep their ctx over any kind of soft reset. And any configurations
done to them here will take affect the latest when
dwc3_core_soft_reset() is called.


Thanks,

-- 
heikki
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