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Message-Id: <1430414252-11210-1-git-send-email-srinivas.kandagatla@linaro.org>
Date:	Thu, 30 Apr 2015 18:17:32 +0100
From:	Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
To:	Patrick Lai <plai@...eaurora.org>, Mark Brown <broonie@...nel.org>
Cc:	Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Banajit Goswami <bgoswami@...eaurora.org>,
	Kenneth Westfield <kwestfie@...eaurora.org>,
	Liam Girdwood <lgirdwood@...il.com>,
	Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.de>,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	alsa-devel@...a-project.org, linux-arm-msm@...r.kernel.org,
	Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Subject: [RFC PATCH 08/14] ASoC: qcom: add dma channel control offset to variant data

This patch adds ability to pass dma channel control bits start offset, which
differ in differnet qcom SOCs. On apq8016 dma channel control bits start
after an offset of 1.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
---
 sound/soc/qcom/lpass-platform.c | 2 +-
 sound/soc/qcom/lpass.h          | 6 ++++++
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/sound/soc/qcom/lpass-platform.c b/sound/soc/qcom/lpass-platform.c
index fc08891..8ab0ac1 100644
--- a/sound/soc/qcom/lpass-platform.c
+++ b/sound/soc/qcom/lpass-platform.c
@@ -91,7 +91,7 @@ static int lpass_platform_pcmops_hw_params(struct snd_pcm_substream *substream,
 	unsigned int channels = params_channels(params);
 	unsigned int regval;
 	int bitwidth;
-	int ret, rdma_port = pcm_data->i2s_port;
+	int ret, rdma_port = pcm_data->i2s_port + v->rdmactl_audif_start;
 
 	bitwidth = snd_pcm_format_width(format);
 	if (bitwidth < 0) {
diff --git a/sound/soc/qcom/lpass.h b/sound/soc/qcom/lpass.h
index 301f784..e07ed52 100644
--- a/sound/soc/qcom/lpass.h
+++ b/sound/soc/qcom/lpass.h
@@ -61,6 +61,12 @@ struct lpass_variant {
 	u32	rdma_reg_stride;
 	u32	rdma_channels;
 
+	/**
+	 * on SOCs like APQ8016 the channel control bits start
+	 * at different offset to ipq806x
+	 **/
+	u32	rdmactl_audif_start;
+
 	/* OCR clock is not present in SOCs like APQ8016 */
 	bool	no_osr_clk;
 	/* SOC specific intialization like clocks */
-- 
1.9.1

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