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Message-ID: <5542B96E.2020400@zytor.com>
Date:	Thu, 30 Apr 2015 16:23:26 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Borislav Petkov <bp@...en8.de>,
	Linus Torvalds <torvalds@...ux-foundation.org>
CC:	Andy Lutomirski <luto@...capital.net>,
	Andy Lutomirski <luto@...nel.org>, X86 ML <x86@...nel.org>,
	Denys Vlasenko <vda.linux@...glemail.com>,
	Brian Gerst <brgerst@...il.com>,
	Denys Vlasenko <dvlasenk@...hat.com>,
	Ingo Molnar <mingo@...nel.org>,
	Steven Rostedt <rostedt@...dmis.org>,
	Oleg Nesterov <oleg@...hat.com>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Alexei Starovoitov <ast@...mgrid.com>,
	Will Drewry <wad@...omium.org>,
	Kees Cook <keescook@...omium.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Mel Gorman <mgorman@...e.com>
Subject: Re: [PATCH] x86_64, asm: Work around AMD SYSRET SS descriptor attribute
 issue

On 04/30/2015 02:39 PM, H. Peter Anvin wrote:
> This is the microbenchmark I used.
> 
> For the record, Intel's intention going forward is that 0F 1F will
> always be as fast or faster than any other alternative.
> 

I probably should have added that the microbenchmark specifically tests
for an atomic 5-byte NOP (as required by tracepoints etc.)  If the
requirement for 5-byte atomic is dropped there might be faster
combinations, e.g. 66 66 66 90 might work better on some platforms, or
using very long 0F 1F sequences.

	-hpa


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