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Message-ID: <3e078ce64eff4ac992900523b1b67f19@HKMAIL103.nvidia.com>
Date:	Sat, 2 May 2015 03:12:27 +0000
From:	Jim Lin <jilin@...dia.com>
To:	Rhyland Klein <rklein@...dia.com>,
	Peter De Schrijver <pdeschrijver@...dia.com>
CC:	Mike Turquette <mturquette@...aro.org>,
	Stephen Warren <swarren@...dotorg.org>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Thierry Reding <thierry.reding@...il.com>,
	Alexandre Courbot <gnurou@...il.com>,
	"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
	"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v3 12/20] clk: tegra: pll: Add specialized logic for T210


> +static void clk_plle_tegra210_is_enabled(struct struct clk_hw *hw) {
Returned type is "int" instead of "void".
Also one "struct" only for "clk_hw *hw"?

> +	struct tegra_clk_pll *pll = to_clk_pll(hw);
> +	u32 val;
> +
> +	val = pll_readl_base(pll);
> +
> +	return val & PLLE_BASE_ENABLE ? 1 : 0; }
> +
--nvpublic
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