linux-kernel - Re: [PATCH 6/7] ARM: dts: mt8135: enable basic SMP bringup for mt8135

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Message-ID: <CABuKBeLXjKYXyPTtR=C887PKfiF-a5dB306zoZsya4s0ir_DVQ@mail.gmail.com>
Date:	Mon, 4 May 2015 09:08:24 +0200
From:	Matthias Brugger <matthias.bgg@...il.com>
To:	Yingjoe Chen <yingjoe.chen@...iatek.com>
Cc:	Mark Rutland <mark.rutland@....com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Russell King <linux@....linux.org.uk>,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	Jason Cooper <jason@...edaemon.net>,
	Catalin Marinas <catalin.marinas@....com>,
	Marc Carino <marc.ceeeee@...il.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	linux-mediatek@...ts.infradead.org,
	srv_heupstream <srv_heupstream@...iatek.com>,
	Sascha Hauer <kernel@...gutronix.de>
Subject: Re: [PATCH 6/7] ARM: dts: mt8135: enable basic SMP bringup for mt8135

2015-05-01 9:43 GMT+02:00 Yingjoe Chen <yingjoe.chen@...iatek.com>:
> Add arch timer node to enable arch-timer support. MT8135 firmware
> doesn't correctly setup arch-timer frequency and CNTVOFF, add
> properties to workaround this.
>
> This also set cpu enable-method to enable SMP.
>
> Signed-off-by: Yingjoe Chen <yingjoe.chen@...iatek.com>
> ---
>  arch/arm/boot/dts/mt8135.dtsi | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
> index 612bd22..eb5e06f 100644
> --- a/arch/arm/boot/dts/mt8135.dtsi
> +++ b/arch/arm/boot/dts/mt8135.dtsi
> @@ -46,6 +46,7 @@
>         cpus {
>                 #address-cells = <1>;
>                 #size-cells = <0>;
> +               enable-method = "mediatek,mt81xx-tz-smp";
>
>                 cpu0: cpu@0 {
>                         device_type = "cpu";
> @@ -103,6 +104,21 @@
>                 };
>         };
>
> +       timer {
> +               compatible = "arm,armv7-timer";
> +               interrupt-parent = <&gic>;
> +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
> +                                         IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
> +                                         IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
> +                                         IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
> +                                         IRQ_TYPE_LEVEL_LOW)>;
> +               clock-frequency = <13000000>;
> +               arm,cpu-registers-not-fw-configured;
> +       };
> +

This does not apply cleanly on v4.1-rc1, please rebase.

Thanks,
Matthias
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