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Message-ID: <CAOMqctTL-y+YxnxuBX8r4osgbz3_+xJ2T2AfCj4idxMo3tCo8g@mail.gmail.com>
Date: Mon, 4 May 2015 13:11:03 +0200
From: Michal Suchanek <hramrach@...il.com>
To: Marek Vasut <marex@...x.de>
Cc: David Woodhouse <dwmw2@...radead.org>,
Brian Norris <computersforpeace@...il.com>,
"Rafa?? Mi??ecki" <zajec5@...il.com>,
Alison Chaiken <alison_chaiken@...tor.com>,
Ben Hutchings <ben@...adent.org.uk>,
Geert Uytterhoeven <geert+renesas@...der.be>,
"Bean Huo (beanhuo)" <beanhuo@...ron.com>,
"grmoore@...era.com" <grmoore@...era.com>,
linux-mtd@...ts.infradead.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/3] MTD: spi-nor: add flag to not use sector erase.
Hello,
On 1 May 2015 at 16:20, Marek Vasut <marex@...x.de> wrote:
> On Friday, May 01, 2015 at 09:05:15 AM, Michal Suchanek wrote:
>> On 1 May 2015 at 01:13, Marek Vasut <marex@...x.de> wrote:
>> I can determine it for this particular chip. However, when the vendor
>> datasheet says the block is 64/32K it might mean that chips with this
>> ID can have either block size.
>
> http://www.chingistek.com/img/Product_Files/Pm25LD010020datasheet%20v04.pdf
> page 21:
>
> SECTOR_ER (20h) erases 4kByte sector.
> BLOCK_ER (d8h) erases 64kByte sector.
>
> http://www.gigadevice.com/product/download/366.html?locale=en_US
> page 27-28:
>
> Sector Erase (SE) (20h) erases 4kByte sector
> 64KB Block Erase (BE) (d8h) erases 64kByte sector
>
It's pretty much the same as the datasheet I used
http://www.elm-tech.com/en/products/spi-flash-memory/gd25q41/gd25q41.pdf
It mentions both
32KB Block Erase (BE) (52H)
and
64KB Block Erase (BE) (D8H)
So the chip probably tries its best to be compatible with any command
set and this last patch is not needed. The memory organization table
on page 7 is not all that reassuring, though.
Thanks
Michal
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