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Message-ID: <CA+55aFz9jW_ii58pMtmVipEmDWfWak0eL47oH_nik4G97Jo72w@mail.gmail.com>
Date: Mon, 4 May 2015 13:45:06 -0700
From: Linus Torvalds <torvalds@...ux-foundation.org>
To: Richard Henderson <rth@...hat.com>
Cc: "H. Peter Anvin" <hpa@...or.com>,
Peter Zijlstra <peterz@...radead.org>,
Vladimir Makarov <vmakarov@...hat.com>,
Jakub Jelinek <jakub@...hat.com>,
Ingo Molnar <mingo@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Borislav Petkov <bp@...en8.de>,
"gcc@....gnu.org" <gcc@....gnu.org>
Subject: Re: [RFC] Design for flag bit outputs from asms
On Mon, May 4, 2015 at 1:33 PM, Richard Henderson <rth@...hat.com> wrote:
>
> A fair point. Though honestly, I was hoping that this feature would mostly be
> used for conditions that are "weird" -- that is, not normally describable by
> arithmetic at all. Otherwise, why are you using inline asm for it?
I could easily imagine using some of the combinations for atomic operations.
For example, doing a "lock decl", and wanting to see if the result is
negative or zero. Sure, it would be possible to set *two* booleans (ZF
and SF), but there's a contiional for "BE"..
Linus
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