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Message-ID: <1430913538-1415-2-git-send-email-Aravind.Gopalakrishnan@amd.com>
Date: Wed, 6 May 2015 06:58:53 -0500
From: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
To: <tglx@...utronix.de>, <mingo@...hat.com>, <hpa@...or.com>,
<tony.luck@...el.com>, <bp@...en8.de>, <jiang.liu@...ux.intel.com>,
<yinghai@...nel.org>
CC: <x86@...nel.org>, <dvlasenk@...hat.com>, <JBeulich@...e.com>,
<slaoub@...il.com>, <luto@...capital.net>,
<dave.hansen@...ux.intel.com>, <oleg@...hat.com>,
<rostedt@...dmis.org>, <rusty@...tcorp.com.au>,
<prarit@...hat.com>, <linux@...musvillemoes.dk>, <jroedel@...e.de>,
<andriy.shevchenko@...ux.intel.com>, <macro@...ux-mips.org>,
<wangnan0@...wei.com>, <linux-kernel@...r.kernel.org>,
<linux-edac@...r.kernel.org>, <rric@...nel.org>
Subject: [PATCH V2 1/6] x86/MCE/AMD: Factor out logging mechanism
Refactoring the code here to setup struct mce and call
mce_log() to log the error.
No functional change is introduced.
Doing this so we can use it later to log error when
deferred error interrupts happen.
Suggested-by: Borislav Petkov <bp@...en8.de>
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
---
arch/x86/kernel/cpu/mcheck/mce_amd.c | 30 ++++++++++++++++++++----------
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 55ad9b3..60ae315 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -264,6 +264,24 @@ init:
}
}
+static void __log_error(unsigned int bank, bool is_thr, u64 misc)
+{
+ struct mce m;
+
+ mce_setup(&m);
+ rdmsrl(MSR_IA32_MCx_STATUS(bank), m.status);
+ if (!(m.status & MCI_STATUS_VAL))
+ return;
+
+ if (is_thr)
+ m.misc = misc;
+
+ m.bank = bank;
+ mce_log(&m);
+
+ wrmsrl(MSR_IA32_MCx_STATUS(bank), 0);
+}
+
/*
* APIC Interrupt Handler
*/
@@ -273,12 +291,12 @@ init:
* the interrupt goes off when error_count reaches threshold_limit.
* the handler will simply log mcelog w/ software defined bank number.
*/
+
static void amd_threshold_interrupt(void)
{
u32 low = 0, high = 0, address = 0;
int cpu = smp_processor_id();
unsigned int bank, block;
- struct mce m;
/* assume first bank caused it */
for (bank = 0; bank < mca_cfg.banks; ++bank) {
@@ -321,15 +339,7 @@ static void amd_threshold_interrupt(void)
return;
log:
- mce_setup(&m);
- rdmsrl(MSR_IA32_MCx_STATUS(bank), m.status);
- if (!(m.status & MCI_STATUS_VAL))
- return;
- m.misc = ((u64)high << 32) | low;
- m.bank = bank;
- mce_log(&m);
-
- wrmsrl(MSR_IA32_MCx_STATUS(bank), 0);
+ __log_error(bank, true, ((u64)high << 32) | low);
}
/*
--
1.9.1
--
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