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Message-Id: <1431039392-12589-1-git-send-email-andi@firstfloor.org>
Date: Thu, 7 May 2015 15:56:23 -0700
From: Andi Kleen <andi@...stfloor.org>
To: peterz@...radead.org
Cc: kan.liang@...el.com, eranian@...gle.com, acme@...radead.org,
linux-kernel@...r.kernel.org
Subject: perf: Add basic Skylake PMU support
This patchkit adds support for the Intel Skylake core PMU to perf, documented in the
recently released SDM 054[1] Vol3, 17.9 and 18.12.
The main user visible feature is timed branch records, which allows to get cycle counts
for individual basic blocks, and a time stamp for PEBS records which improves
multi-record PEBS. The LBRs (branch records) also have been extended to 32, which allows
more accurate branch sampling and deeper call stacks.
-Andi
[1] http://www.cps.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html
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