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Message-ID: <1431075343-7887-1-git-send-email-leilk.liu@mediatek.com>
Date:	Fri, 8 May 2015 16:55:40 +0800
From:	<leilk.liu@...iatek.com>
To:	Mark Rutland <mark.rutland@....com>,
	Mark Brown <broonie@...nel.org>,
	Matthias Brugger <matthias.bgg@...il.com>
CC:	Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will.deacon@....com>,
	Leilk Liu <leilk.liu@...iatek.com>,
	Eddie Huang <eddie.huang@...iatek.com>,
	Hongzhou Yang <hongzhou.yang@...iatek.com>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-spi@...r.kernel.org>, <linux-mediatek@...ts.infradead.org>,
	<srv_heupstream@...iatek.com>, Sascha Hauer <kernel@...gutronix.de>
Subject: Add Mediatek SPI driver 

Mediatek SPI BUS controller has 3 hardware restrictions:
1. Hw has the restriction that in one transfer, length must be a multiple of
   1024, when it's greater than 1024bytes.
2. Hw tx/rx have 4bytes aligned restriction.
3. For MT8173 IC: RX must enable TX, then TX transfer dummy data; TX don't need
   to enable RX.
Some workarounds are done in SPI driver code base on v4.1-rc1.

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