lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [day] [month] [year] [list]
Message-ID: <tip-4op0qdukegrdumyefz4icxk0@git.kernel.org>
Date:	Sun, 10 May 2015 00:08:07 -0700
From:	tip-bot for Arnaldo Carvalho de Melo <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	bp@...e.de, dsahern@...il.com, dzickus@...hat.com,
	fweisbec@...il.com, namhyung@...nel.org, tglx@...utronix.de,
	jolsa@...hat.com, mingo@...nel.org, linux-kernel@...r.kernel.org,
	adrian.hunter@...el.com, eranian@...gle.com, hpa@...or.com,
	acme@...hat.com
Subject: [tip:perf/core] perf tools: Move ia64 barrier.h stuff to tools/
 arch/ia64/include/asm/barrier.h

Commit-ID:  163e589d0519b6d6c1e5500f4d14b1fc10b736fe
Gitweb:     http://git.kernel.org/tip/163e589d0519b6d6c1e5500f4d14b1fc10b736fe
Author:     Arnaldo Carvalho de Melo <acme@...hat.com>
AuthorDate: Thu, 7 May 2015 18:03:14 -0300
Committer:  Arnaldo Carvalho de Melo <acme@...hat.com>
CommitDate: Fri, 8 May 2015 16:05:06 -0300

perf tools: Move ia64 barrier.h stuff to tools/arch/ia64/include/asm/barrier.h

We will need it for atomic.h, so move it from the ad-hoc tools/perf/
place to a tools/ subset of the kernel arch/ hierarchy.

Cc: Adrian Hunter <adrian.hunter@...el.com>
Cc: Borislav Petkov <bp@...e.de>
Cc: David Ahern <dsahern@...il.com>
Cc: Don Zickus <dzickus@...hat.com>
Cc: Frederic Weisbecker <fweisbec@...il.com>
Cc: Jiri Olsa <jolsa@...hat.com>
Cc: Namhyung Kim <namhyung@...nel.org>
Cc: Stephane Eranian <eranian@...gle.com>
Link: http://lkml.kernel.org/n/tip-4op0qdukegrdumyefz4icxk0@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@...hat.com>
---
 {arch => tools/arch}/ia64/include/asm/barrier.h | 63 ++++---------------------
 tools/include/asm/barrier.h                     |  2 +
 tools/perf/MANIFEST                             |  1 +
 tools/perf/perf-sys.h                           |  3 --
 4 files changed, 12 insertions(+), 57 deletions(-)

diff --git a/arch/ia64/include/asm/barrier.h b/tools/arch/ia64/include/asm/barrier.h
similarity index 52%
copy from arch/ia64/include/asm/barrier.h
copy to tools/arch/ia64/include/asm/barrier.h
index f6769eb..e4422b4 100644
--- a/arch/ia64/include/asm/barrier.h
+++ b/tools/arch/ia64/include/asm/barrier.h
@@ -1,4 +1,6 @@
 /*
+ * Copied from the kernel sources to tools/:
+ *
  * Memory barrier definitions.  This is based on information published
  * in the Processor Abstraction Layer and the System Abstraction Layer
  * manual.
@@ -8,8 +10,8 @@
  * Copyright (C) 1999 Asit Mallick <asit.k.mallick@...el.com>
  * Copyright (C) 1999 Don Dugger <don.dugger@...el.com>
  */
-#ifndef _ASM_IA64_BARRIER_H
-#define _ASM_IA64_BARRIER_H
+#ifndef _TOOLS_LINUX_ASM_IA64_BARRIER_H
+#define _TOOLS_LINUX_ASM_IA64_BARRIER_H
 
 #include <linux/compiler.h>
 
@@ -35,59 +37,12 @@
  * it's (presumably) much slower than mf and (b) mf.a is supported for
  * sequential memory pages only.
  */
+
+/* XXX From arch/ia64/include/uapi/asm/gcc_intrin.h */
+#define ia64_mf()       asm volatile ("mf" ::: "memory")
+
 #define mb()		ia64_mf()
 #define rmb()		mb()
 #define wmb()		mb()
 
-#define dma_rmb()	mb()
-#define dma_wmb()	mb()
-
-#ifdef CONFIG_SMP
-# define smp_mb()	mb()
-#else
-# define smp_mb()	barrier()
-#endif
-
-#define smp_rmb()	smp_mb()
-#define smp_wmb()	smp_mb()
-
-#define read_barrier_depends()		do { } while (0)
-#define smp_read_barrier_depends()	do { } while (0)
-
-#define smp_mb__before_atomic()	barrier()
-#define smp_mb__after_atomic()	barrier()
-
-/*
- * IA64 GCC turns volatile stores into st.rel and volatile loads into ld.acq no
- * need for asm trickery!
- */
-
-#define smp_store_release(p, v)						\
-do {									\
-	compiletime_assert_atomic_type(*p);				\
-	barrier();							\
-	ACCESS_ONCE(*p) = (v);						\
-} while (0)
-
-#define smp_load_acquire(p)						\
-({									\
-	typeof(*p) ___p1 = ACCESS_ONCE(*p);				\
-	compiletime_assert_atomic_type(*p);				\
-	barrier();							\
-	___p1;								\
-})
-
-/*
- * XXX check on this ---I suspect what Linus really wants here is
- * acquire vs release semantics but we can't discuss this stuff with
- * Linus just yet.  Grrr...
- */
-#define set_mb(var, value)	do { (var) = (value); mb(); } while (0)
-
-/*
- * The group barrier in front of the rsm & ssm are necessary to ensure
- * that none of the previous instructions in the same group are
- * affected by the rsm/ssm.
- */
-
-#endif /* _ASM_IA64_BARRIER_H */
+#endif /* _TOOLS_LINUX_ASM_IA64_BARRIER_H */
diff --git a/tools/include/asm/barrier.h b/tools/include/asm/barrier.h
index a579a2e..659aa60 100644
--- a/tools/include/asm/barrier.h
+++ b/tools/include/asm/barrier.h
@@ -10,4 +10,6 @@
 #include "../../arch/sparc/include/asm/barrier.h"
 #elif defined(__alpha__)
 #include "../../arch/alpha/include/asm/barrier.h"
+#elif defined(__ia64__)
+#include "../../arch/ia64/include/asm/barrier.h"
 #endif
diff --git a/tools/perf/MANIFEST b/tools/perf/MANIFEST
index 9919ee3..74981a6 100644
--- a/tools/perf/MANIFEST
+++ b/tools/perf/MANIFEST
@@ -1,5 +1,6 @@
 tools/perf
 tools/arch/alpha/include/asm/barrier.h
+tools/arch/ia64/include/asm/barrier.h
 tools/arch/powerpc/include/asm/barrier.h
 tools/arch/s390/include/asm/barrier.h
 tools/arch/sh/include/asm/barrier.h
diff --git a/tools/perf/perf-sys.h b/tools/perf/perf-sys.h
index 4710f057..79052fd 100644
--- a/tools/perf/perf-sys.h
+++ b/tools/perf/perf-sys.h
@@ -65,9 +65,6 @@
 #endif
 
 #ifdef __ia64__
-#define mb()		asm volatile ("mf" ::: "memory")
-#define wmb()		asm volatile ("mf" ::: "memory")
-#define rmb()		asm volatile ("mf" ::: "memory")
 #define cpu_relax()	asm volatile ("hint @pause" ::: "memory")
 #define CPUINFO_PROC	{"model name"}
 #endif
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ