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Message-ID: <CACRpkda9gP45BUyh2bCYCvUM1MM+ZbUtbiyqsQ-ZrGde7cEGrg@mail.gmail.com>
Date: Tue, 12 May 2015 13:21:43 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Andrew Bresticker <abrestic@...omium.org>
Cc: Ralf Baechle <ralf@...ux-mips.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
Linux MIPS <linux-mips@...ux-mips.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Damien Horsley <Damien.Horsley@...tec.com>,
Govindraj Raja <govindraj.raja@...tec.com>,
Ezequiel Garcia <ezequiel.garcia@...tec.com>,
Kevin Cernekee <cernekee@...omium.org>,
James Hartley <james.hartley@...tec.com>,
James Hogan <james.hogan@...tec.com>
Subject: Re: [PATCH V5] pinctrl: Add Pistachio SoC pin control driver
On Wed, May 6, 2015 at 9:59 PM, Andrew Bresticker <abrestic@...omium.org> wrote:
> Add a driver for the pin controller present on the IMG Pistachio SoC.
> This driver provides pinmux and pinconfig operations as well as GPIO
> and IRQ chips for the GPIO banks.
>
> Signed-off-by: Damien Horsley <Damien.Horsley@...tec.com>
> Signed-off-by: Govindraj Raja <govindraj.raja@...tec.com>
> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@...tec.com>
> Signed-off-by: Kevin Cernekee <cernekee@...omium.org>
> Signed-off-by: Andrew Bresticker <abrestic@...omium.org>
> Cc: James Hartley <james.hartley@...tec.com>
> Cc: James Hogan <james.hogan@...tec.com>
> ---
> Changes from v4:
> - Switched to using gpiochip_add_pin_range().
> - Fixed up Kconfig entry.
This version applied. Awesome job with this driver, thanks!
Yours,
Linus Walleij
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