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Date:	Tue, 12 May 2015 14:45:16 +0200
From:	Sascha Hauer <s.hauer@...gutronix.de>
To:	Eddie Huang <eddie.huang@...iatek.com>
Cc:	Wolfram Sang <wsa@...-dreams.de>,
	Sascha Hauer <kernel@...gutronix.de>,
	srv_heupstream@...iatek.com, Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Matthias Brugger <matthias.bgg@...il.com>,
	Jean Delvare <jdelvare@...e.de>,
	David Box <david.e.box@...ux.intel.com>,
	Doug Anderson <dianders@...omium.org>,
	Zhangfei Gao <zhangfei.gao@...aro.org>,
	Max Schwarz <max.schwarz@...ine.de>,
	Boris BREZILLON <boris.brezillon@...e-electrons.com>,
	Anders Berg <anders.berg@...gotech.com>,
	Neelesh Gupta <neelegup@...ux.vnet.ibm.com>,
	Lee Jones <lee.jones@...aro.org>,
	Arnd Bergmann <arnd@...db.de>, Ray Jui <rjui@...adcom.com>,
	Simon Glass <sjg@...omium.org>,
	Wei Yan <sledge.yanwei@...wei.com>,
	Beniamino Galvani <b.galvani@...il.com>,
	Xudong Chen <xudong.chen@...iatek.com>,
	Liguo Zhang <liguo.zhang@...iatek.com>,
	linux-i2c@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v7 0/3] ARM: mediatek: Add driver for Mediatek I2C

On Wed, May 06, 2015 at 04:37:04PM +0800, Eddie Huang wrote:
> This series is for Mediatek SoCs I2C controller common bus driver.
> 
> Earlier MTK SoC ((for example, MT6589, MT8135)) I2C HW has some limitationes.
> New generation SoC like MT8173 fix following limitations:
> 
> 1. Only support one i2c_msg number. One exception is WRRD (write then read)
> mode. WRRD can have two i2c_msg numbers.
> 
> 2. Mediatek I2C controller support WRRD(write then read) mode, in WRRD
> mode the Repeat Start will be issued between 2 messages.
> In this driver if 2 messages is first write then read, the driver will
> combine 2 messages using Write-Read mode so the RS will be issued between
> the 2 messages.
> 
> 3. The max transfer data length is 255 in one message. In WRRD mode, the
> max data length of second msg is 31.
> 
> MT8135 and MT6589 can control I2C pins on PMIC(MT6397) by setting the i2c
> registers in MT8135 side. In this case, driver should set OFFSET_PATH_DIR
> bit first, the operation on other registers are still the same.
> For now MT6589/MT8135 support this, MT6577/MT6595/MT8127 do not support.
> For example, If want to use I2C4/5/6 pins on MT8135 just need to enable
> the pinmux, else if want to use I2C pins on PMIC(MT6397) need to add
> "mediatek,have-pmic" property in the .dts file of each platform.
> 
> This driver is based on 4.1-rc1.
> 
> Change in v7:
> Fix mtk_i2c_of_match in wrong patch bug.
> 
> Change in v6:
> 1. Update binding document not use default clock-frequency as example.
> 2. Add mtk_i2c_compatible struct and pass hardware capabilities
>    through of_device_id
> 3. Remove some hardware setting in mtk_i2c_do_transfer to mtk_i2c_init_hw
>    so just init one time.
> 4. Correct mtk_i2c_parse_dt don't set default clock bug.
> 
> Change in v5:
> Apply new i2c_adapter_quirks patch [2]. Change to use dam_map_single to map
> dma buffer. Add spinlock to fix race condition. Check of_property_read_u32
> return value. Remove I2C_FUNC_10BIT_ADDR capability due to driver not implement.
> Add MT8173 I2C driver.
> 
> Change in v4:
> Modify to support i2c_adapter_quirks base on Wolfram's patch [1].
> Remove check transfer size and WRRD combine code. Instead, fill quirk
> property and let i2c_check_for_quirks to do the filter.
> 
> [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-January/314804.html
> [2] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-February/325744.html
> 
> Eddie Huang (1):
>   I2C: mediatek: Add driver for MediaTek MT8173 I2C controller
> 
> Xudong Chen (2):
>   dt-bindings: Add I2C bindings for mt65xx/mt81xx.
>   I2C: mediatek: Add driver for MediaTek I2C controller

All:

Acked-by: Sascha Hauer <s.hauer@...gutronix.de>

Sascha

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