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Message-Id: <1431435110-22595-11-git-send-email-lee.jones@linaro.org>
Date: Tue, 12 May 2015 13:51:47 +0100
From: Lee Jones <lee.jones@...aro.org>
To: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Cc: kernel@...inux.com, devicetree@...r.kernel.org,
Lee Jones <lee.jones@...aro.org>
Subject: [PATCH 10/13] ARM: STi: STiH416: Enable PMU IRQs
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
Here we are enabling PMU IRQs on both channels.
Signed-off-by: Lee Jones <lee.jones@...aro.org>
---
arch/arm/boot/dts/stih416.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
index cc5b78d..9dca173 100644
--- a/arch/arm/boot/dts/stih416.dtsi
+++ b/arch/arm/boot/dts/stih416.dtsi
@@ -13,6 +13,7 @@
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset-controller/stih416-resets.h>
+#include <dt-bindings/interrupt-controller/irq-st.h>
/ {
L2: cache-controller {
compatible = "arm,pl310-cache";
@@ -98,6 +99,15 @@
reg = <0xfe4b5100 0x8>;
};
+ irq-syscfg {
+ compatible = "st,stih416-irq-syscfg";
+ st,syscfg = <&syscfg_cpu>;
+ st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
+ <ST_IRQ_SYSCFG_PMU_1>;
+ st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
+ <ST_IRQ_SYSCFG_DISABLED>;
+ };
+
serial2: serial@...32000{
compatible = "st,asc";
status = "disabled";
--
1.9.1
--
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