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Message-ID: <1431446828-5473-4-git-send-email-rogerq@ti.com>
Date:	Tue, 12 May 2015 19:07:08 +0300
From:	Roger Quadros <rogerq@...com>
To:	<kishon@...com>, <tony@...mide.com>
CC:	<nm@...com>, <nsekhar@...com>, <balbi@...com>,
	<grygorii.strashko@...com>, <linux-kernel@...r.kernel.org>,
	<linux-omap@...r.kernel.org>, Roger Quadros <rogerq@...com>
Subject: [PATCH 3/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY

This register is required to be passed to the SATA PHY driver
to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock).

Signed-off-by: Roger Quadros <rogerq@...com>
Signed-off-by: Sekhar Nori <nsekhar@...com>
---
 arch/arm/boot/dts/dra7.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index f03a091..260f300 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1135,6 +1135,7 @@
 				ctrl-module = <&omap_control_sata>;
 				clocks = <&sys_clkin1>, <&sata_ref_clk>;
 				clock-names = "sysclk", "refclk";
+				syscon-pllreset = <&dra7_ctrl_core 0x3fc>;
 				#phy-cells = <0>;
 			};
 
-- 
2.1.4

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