linux-kernel - Re: [PATCH 1/2] ARM: dts: Add binding for Broadcom MSPI driver.

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Message-ID: <555248C1.2010203@gmail.com>
Date:	Tue, 12 May 2015 11:38:57 -0700
From:	Florian Fainelli <f.fainelli@...il.com>
To:	Jonathan Richardson <jonathar@...adcom.com>,
	Mark Brown <broonie@...nel.org>,
	Dmitry Torokhov <dtor@...gle.com>,
	Anatol Pomazau <anatol@...gle.com>
CC:	Scott Branden <sbranden@...adcom.com>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org,
	bcm-kernel-feedback-list <bcm-kernel-feedback-list@...adcom.com>,
	devicetree@...r.kernel.org, computersforpeace@...il.com
Subject: Re: [PATCH 1/2] ARM: dts: Add binding for Broadcom MSPI driver.

On 12/05/15 10:38, Jonathan Richardson wrote:
> 
> Signed-off-by: Jonathan Richardson <jonathar@...adcom.com>
> ---
>  .../devicetree/bindings/spi/brcm,mspi-spi.txt      |   39 ++++++++++++++++++++
>  1 file changed, 39 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spi/brcm,mspi-spi.txt
> 
> diff --git a/Documentation/devicetree/bindings/spi/brcm,mspi-spi.txt b/Documentation/devicetree/bindings/spi/brcm,mspi-spi.txt
> new file mode 100644
> index 0000000..e86a7a0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/brcm,mspi-spi.txt
> @@ -0,0 +1,39 @@
> +Broadcom MSPI controller
> +
> +The Broadcom MSPI controller is a SPI controller found on various chips such
> +as Cygnus.
> +
> +Required properties:
> +- compatible: Must be "brcm,mspi-v0".
> +
> +- reg:  The first register is the physical base address of the MSPI controller.
> +  The second register is the address of the MSPI interrupt control registers. It
> +  is only required for chips that have a separate register set for extended
> +  interrupt control. This is required for Cygnus.

In which case we would want to mandate the use of a "reg-names"
property, because there could be other kinds of controllers, such as the
one found on BCM7xxx where we have the 3 "reg" units, the first one is
the MSPI controller register range, while the two others are used for
the Boot SPI portion of the controller to accelerate flash reads, so
completely unrelated here.

Right now, using your driver on this Device Tree/configuration makes
bcm_mspi request the second register range and mistakenly assuming this
is the extended interrupt control register.

You could argue that the BSPI portion should be a separate node, but
even so, better be safe than sorry.
-- 
Florian
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