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Message-ID: <tip-9cf82e72ec449b4516843377ac7a20abe300c64f@git.kernel.org>
Date:	Wed, 13 May 2015 01:48:34 -0700
From:	tip-bot for Lucas Stach <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	marc.zyngier@....com, tglx@...utronix.de, dev@...xeye.de,
	gnurou@...il.com, swarren@...dotorg.org, mingo@...nel.org,
	thierry.reding@...il.com, hpa@...or.com, jason@...edaemon.net,
	linux-kernel@...r.kernel.org
Subject: [tip:irq/urgent] irqchip: tegra:
  Set the proper base address in irq chip data

Commit-ID:  9cf82e72ec449b4516843377ac7a20abe300c64f
Gitweb:     http://git.kernel.org/tip/9cf82e72ec449b4516843377ac7a20abe300c64f
Author:     Lucas Stach <dev@...xeye.de>
AuthorDate: Sat, 9 May 2015 22:06:54 +0200
Committer:  Thomas Gleixner <tglx@...utronix.de>
CommitDate: Wed, 13 May 2015 10:46:07 +0200

irqchip: tegra: Set the proper base address in irq chip data

The irq chip functions use the irq chipdata directly as the base register
address of the controller, so this should be passed in instead of a pointer
to the array address holding the base address.

This fixes Tegra20 CPUidle as now the un-/masking of IRQs at the LIC level
works again, but more importantly it fixes the resulting memory corruption.

Fixes: de3ce0804916 ' irqchip: tegra: Add DT-based support for legacy interrupt controller'
Signed-off-by: Lucas Stach <dev@...xeye.de>
Cc: Stephen Warren <swarren@...dotorg.org>
Cc: Thierry Reding <thierry.reding@...il.com>
Cc: Alexandre Courbot <gnurou@...il.com>
Cc: Jason Cooper <jason@...edaemon.net>
Cc: Marc Zyngier <marc.zyngier@....com>
Link: http://lkml.kernel.org/r/1431202014-3136-1-git-send-email-dev@lynxeye.de
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
---
 drivers/irqchip/irq-tegra.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-tegra.c b/drivers/irqchip/irq-tegra.c
index 51c485d..f67bbd8 100644
--- a/drivers/irqchip/irq-tegra.c
+++ b/drivers/irqchip/irq-tegra.c
@@ -264,7 +264,7 @@ static int tegra_ictlr_domain_alloc(struct irq_domain *domain,
 
 		irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
 					      &tegra_ictlr_chip,
-					      &info->base[ictlr]);
+					      info->base[ictlr]);
 	}
 
 	parent_args = *args;
--
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