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Message-Id: <1431608341-10936-3-git-send-email-clabbe.montjoie@gmail.com>
Date:	Thu, 14 May 2015 14:58:59 +0200
From:	LABBE Corentin <clabbe.montjoie@...il.com>
To:	robh+dt@...nel.org, pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	maxime.ripard@...e-electrons.com, linux@....linux.org.uk,
	herbert@...dor.apana.org.au, davem@...emloft.net,
	akpm@...ux-foundation.org, gregkh@...uxfoundation.org,
	mchehab@....samsung.com, joe@...ches.com, tj@...nel.org,
	arnd@...db.de, boris.brezillon@...e-electrons.com
Cc:	devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	linux-crypto@...r.kernel.org, linux-sunxi@...glegroups.com,
	LABBE Corentin <clabbe.montjoie@...il.com>
Subject: [PATCH v9 2/4] ARM: sun4i: dt: Add DT bindings documentation for SUN4I Security System

This patch adds documentation for Device-Tree bindings for the Security System
cryptographic accelerator driver.

Signed-off-by: LABBE Corentin <clabbe.montjoie@...il.com>
---
 Documentation/devicetree/bindings/crypto/sun4i-ss.txt | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/crypto/sun4i-ss.txt

diff --git a/Documentation/devicetree/bindings/crypto/sun4i-ss.txt b/Documentation/devicetree/bindings/crypto/sun4i-ss.txt
new file mode 100644
index 0000000..f2192d4
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/sun4i-ss.txt
@@ -0,0 +1,19 @@
+* Allwinner Security System found on A20 SoC
+
+Required properties:
+- compatible : Should be "allwinner,sun4i-a20-crypto".
+- reg: Should contain the Security System register location and length.
+- interrupts: Should contain the IRQ line for the Security System.
+- clocks : List of clock specifiers, corresponding to ahb and ss.
+- clock-names : Name of the functional clock, should be
+	* "ahb" : AHB gating clock
+	* "mod" : SS controller clock
+
+Example:
+	crypto: crypto-engine@...15000 {
+		compatible = "allwinner,sun4i-a20-crypto";
+		reg = <0x01c15000 0x1000>;
+		interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&ahb_gates 5>, <&ss_clk>;
+		clock-names = "ahb", "mod";
+	};
-- 
2.3.6

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