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Message-ID: <20150514164048.GF19345@e104818-lin.cambridge.arm.com>
Date:	Thu, 14 May 2015 17:40:49 +0100
From:	Catalin Marinas <catalin.marinas@....com>
To:	Dirk Behme <dirk.behme@...bosch.com>
Cc:	Michal Simek <michal.simek@...inx.com>,
	linux-arm-kernel@...ts.infradead.org,
	Josh Cartwright <josh.cartwright@...com>,
	Peter Crosthwaite <peter.crosthwaite@...inx.com>,
	Russell King <linux@....linux.org.uk>, monstr@...str.eu,
	linux-kernel@...r.kernel.org,
	Thomas Betker <thomas.betker@...de-schwarz.com>,
	Steffen Trumtrar <s.trumtrar@...gutronix.de>,
	Sören Brinkmann <soren.brinkmann@...inx.com>
Subject: Re: [PATCH] ARM: zynq: Set bit 22 in PL310 AuxCtrl register (6395/1)

On Tue, May 12, 2015 at 08:31:35AM +0200, Dirk Behme wrote:
> On 12.05.2015 08:22, Michal Simek wrote:
> >From: Thomas Betker <thomas.betker@...de-schwarz.com>
> >
> >This patch is based on the
> >commit 1a8e41cd672f ("ARM: 6395/1: VExpress: Set bit 22 in the PL310
> >(cache controller) AuxCtlr register")
> 
> I've been under the impression that this shouldn't be done in the kernel,
> but in the boot loader/firmware:
> 
> https://lkml.org/lkml/2015/2/20/199
> 
> http://lists.denx.de/pipermail/u-boot/2015-March/207803.html

If you can fix it in the boot loader or firmware even better. If it's
not doable, this patch will help (if Russell takes it):

http://article.gmane.org/gmane.linux.ports.sh.devel/45685

-- 
Catalin
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