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Message-ID: <CAPcyv4je=q92aytAXLR=Eqc3yD8pdmSuyuCF+4QJRb34LFU=VQ@mail.gmail.com>
Date:	Thu, 14 May 2015 14:52:18 -0700
From:	Dan Williams <dan.j.williams@...el.com>
To:	Toshi Kani <toshi.kani@...com>
Cc:	"H. Peter Anvin" <hpa@...or.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Arnd Bergmann <arnd@...db.de>, jgross@...e.com,
	Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
	"linux-nvdimm@...ts.01.org" <linux-nvdimm@...ts.01.org>,
	mcgrof@...e.com, X86 ML <x86@...nel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	stefan.bader@...onical.com, Andy Lutomirski <luto@...capital.net>,
	linux-mm@...ck.org, hmh@....eng.br, Christoph Hellwig <hch@....de>,
	Matthew Wilcox <willy@...ux.intel.com>
Subject: Re: [PATCH v9 10/10] drivers/block/pmem: Map NVDIMM with ioremap_wt()

On Wed, May 13, 2015 at 2:05 PM, Toshi Kani <toshi.kani@...com> wrote:
> The pmem driver maps NVDIMM with ioremap_nocache() as we cannot
> write back the contents of the CPU caches in case of a crash.
>
> This patch changes to use ioremap_wt(), which provides uncached
> writes but cached reads, for improving read performance.

I'm thinking that for the libnd integration we don't want the pmem
driver hard coding the cache-policy decision.  This is something that
should be specified to nd_pmem_region_create().  Especially
considering that platform firmware tables (NFIT) may specify the cache
policy for the range.  As Matthew Wilcox mentioned offline we also
must match the DAX-to-mmap cache policy with the policy for the driver
mapping  for architectures that are not capable of multiple mappings
of the same physical address with different policies.
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