linux-kernel - Re: [PATCH] ARM: tegra: cpuidle: implement cpuidle_state.enter

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Message-ID: <CAAObsKBLHqf1+KUE89Orr7ZwzY3-WEW1CHokSOxSD9pEOmTkhg@mail.gmail.com>
Date:	Fri, 15 May 2015 11:03:35 +0200
From:	Tomeu Vizoso <tomeu.vizoso@...labora.com>
To:	Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Cc:	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
	"linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
	"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
	Russell King <linux@....linux.org.uk>,
	Stephen Warren <swarren@...dotorg.org>,
	Thierry Reding <thierry.reding@...il.com>,
	Alexandre Courbot <gnurou@...il.com>,
	Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
	Kyungmin Park <kyungmin.park@...sung.com>,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	Kukjin Kim <kgene.kim@...sung.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze()

On 17 April 2015 at 16:08, Lorenzo Pieralisi <lorenzo.pieralisi@....com> wrote:
> On Thu, Apr 16, 2015 at 03:37:19PM +0100, Tomeu Vizoso wrote:
>
> [...]
>
>> >> I don't know what FIQs are. :-)
>> >
>> > In short, fast IRQs, it is a separate IRQ line handled as a separate
>> > exception source with some private (banked) registers that minimize registers
>> > saving/restoring. They are not identical to NMI on x86, since
>> > their behaviour (handling) may be overriden by platforms and they
>> > can be masked.
>> >
>> >> ->enter_freeze is entered with interrupts disabled on the local CPU.  It is
>> >> not supposed to re-enable them.  That is, while in the ->enter_freeze callback
>> >> routine, the CPU must not be interrupted aby anything other than NMI.
>> >
>> > It boils down to what FIQs handlers are allowed to do with tick frozen
>> > and what they are (may be) currently used for.
>> >
>> > Russell has more insights on this than I do, in particular what FIQs are
>> > currently used for on ARM and if we can leave them enabled safely with tick
>> > frozen.
>>
>> But even if it's currently safe to leave them enabled, is there any
>> reason for not disabling them?
>
> Ok, the point here is: either it is safe, and you leave them enabled,
> or it is not and we must disable them *before* enter_freeze() is entered.
>
> Disabling them in the platform enter_freeze() hook does not make sense,
> because this means we run with FIQs enabled with tick frozen, either
> it is safe or it is not, it can't be both.

I have been looking and asking around, and seems like we should
actually leave FIQs enabled when the tick is frozen and only disable
them within enter_freeze.

My understanding is that FIQ handlers are extremely limited in what
they can do, with the main use being NMI-like functionality. There are
a handful of other FIQ handlers in mainline, but they don't call into
any other kernel code and limit themselves to doing some basic I/O.

The only reason why they should be disabled in enter_freeze is that
the context of the CPU that is going to a lower power state could
become corrupted if a FIQ gets fired during a save or restore
operation.

Regards,

Tomeu

> I would ask Russell opinion on this, before making any decision.
>
> Lorenzo
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